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(Updated May 11, 2015, 3:52 p.m.) Review request for Default. Repository: gem5 Description (updated) ------- Changeset 10833:9fd3d5837e1e --------------------------- cpu, kvm: Don't flag TC as dirty after m5op Currently, none of the m5ops changes the TC, and therefore it cannot be dirty. Syncing the TC results in incorrect register state for the simulated system, since the kernel will first emulate the instruction and then update the guest's register state. Diffs ----- src/cpu/kvm/base.cc fbdaa08aaa42 Diff: http://reviews.gem5.org/r/2774/diff/ Testing ------- Thanks, Nikos Nikoleris _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
