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Good work, but I think the width should be defined at the bit level not at the byte level, to be more generic. Although you've done this change for simd, it could be used for other type of operations. - Nathanael Premillieu On May 17, 2015, 9:56 p.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2829/ > ----------------------------------------------------------- > > (Updated May 17, 2015, 9:56 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10839:cddf2e3579c9 > --------------------------- > cpu: o3: support operand width with functional units > > This patch adds a parameter opWidth which is number of bytes of the operand > that a functional unit can operate each cycle. This is meant to be used > only for simd operations. The latency of such a functional unit would be the > size > of the operand divided by the width of the functional unit. > > > Diffs > ----- > > src/cpu/FuncUnit.py 9b424e7adac5 > src/cpu/o3/dyn_inst.hh 9b424e7adac5 > src/cpu/o3/fu_pool.hh 9b424e7adac5 > src/cpu/o3/fu_pool.cc 9b424e7adac5 > src/cpu/o3/inst_queue_impl.hh 9b424e7adac5 > src/cpu/static_inst.hh 9b424e7adac5 > > Diff: http://reviews.gem5.org/r/2829/diff/ > > > Testing > ------- > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
