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Review request for Default. Repository: gem5 Description ------- Changeset 10890:7de59d6d7ab1 --------------------------- ruby: replace Address by Addr This patch eliminates the type Address defined by the ruby memory system. This memory system would not use the type Addr that is in use by the rest of the system. Diffs ----- src/mem/protocol/RubySlicc_MemControl.sm e4f63f1d502d src/mem/protocol/RubySlicc_Types.sm e4f63f1d502d src/mem/protocol/RubySlicc_Util.sm e4f63f1d502d src/mem/ruby/common/Address.hh e4f63f1d502d src/mem/ruby/common/Address.cc e4f63f1d502d src/mem/ruby/common/SubBlock.hh e4f63f1d502d src/mem/ruby/common/SubBlock.cc e4f63f1d502d src/mem/ruby/common/TypeDefines.hh e4f63f1d502d src/mem/ruby/filters/AbstractBloomFilter.hh e4f63f1d502d src/mem/ruby/filters/BlockBloomFilter.hh e4f63f1d502d src/mem/ruby/filters/BlockBloomFilter.cc e4f63f1d502d src/mem/ruby/filters/BulkBloomFilter.hh e4f63f1d502d src/mem/ruby/filters/BulkBloomFilter.cc e4f63f1d502d src/mem/ruby/filters/GenericBloomFilter.hh e4f63f1d502d src/mem/ruby/filters/GenericBloomFilter.cc e4f63f1d502d src/mem/ruby/filters/H3BloomFilter.hh e4f63f1d502d src/mem/ruby/filters/H3BloomFilter.cc e4f63f1d502d src/mem/ruby/filters/LSB_CountingBloomFilter.hh e4f63f1d502d src/mem/ruby/filters/LSB_CountingBloomFilter.cc e4f63f1d502d src/mem/ruby/filters/MultiBitSelBloomFilter.hh e4f63f1d502d src/mem/ruby/filters/MultiBitSelBloomFilter.cc e4f63f1d502d src/mem/ruby/filters/MultiGrainBloomFilter.hh e4f63f1d502d src/mem/ruby/filters/MultiGrainBloomFilter.cc e4f63f1d502d src/mem/ruby/filters/NonCountingBloomFilter.hh e4f63f1d502d src/mem/ruby/filters/NonCountingBloomFilter.cc e4f63f1d502d src/mem/ruby/network/MessageBuffer.hh e4f63f1d502d src/mem/ruby/network/MessageBuffer.cc e4f63f1d502d src/mem/ruby/profiler/AccessTraceForAddress.hh e4f63f1d502d src/mem/ruby/profiler/AddressProfiler.hh e4f63f1d502d src/mem/ruby/profiler/AddressProfiler.cc e4f63f1d502d src/mem/ruby/profiler/StoreTrace.hh e4f63f1d502d src/mem/ruby/profiler/StoreTrace.cc e4f63f1d502d src/mem/ruby/slicc_interface/AbstractCacheEntry.hh e4f63f1d502d src/mem/ruby/slicc_interface/AbstractCacheEntry.cc e4f63f1d502d src/mem/ruby/slicc_interface/AbstractController.hh e4f63f1d502d src/mem/ruby/slicc_interface/AbstractController.cc e4f63f1d502d src/mem/ruby/slicc_interface/RubyRequest.hh e4f63f1d502d src/mem/ruby/slicc_interface/RubyRequest.cc e4f63f1d502d src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh e4f63f1d502d src/mem/ruby/slicc_interface/RubySlicc_Util.hh e4f63f1d502d src/mem/ruby/structures/CacheMemory.hh e4f63f1d502d src/mem/ruby/structures/CacheMemory.cc e4f63f1d502d src/mem/ruby/structures/DirectoryMemory.hh e4f63f1d502d src/mem/ruby/structures/DirectoryMemory.cc e4f63f1d502d src/mem/ruby/structures/MemoryNode.hh e4f63f1d502d src/mem/ruby/structures/PerfectCacheMemory.hh e4f63f1d502d src/mem/ruby/structures/PersistentTable.hh e4f63f1d502d src/mem/ruby/structures/PersistentTable.cc e4f63f1d502d src/mem/ruby/structures/Prefetcher.hh e4f63f1d502d src/mem/ruby/structures/Prefetcher.cc e4f63f1d502d src/mem/ruby/structures/RubyMemoryControl.hh e4f63f1d502d src/mem/ruby/structures/RubyMemoryControl.cc e4f63f1d502d src/mem/ruby/structures/TBETable.hh e4f63f1d502d src/mem/ruby/structures/TimerTable.hh e4f63f1d502d src/mem/ruby/structures/TimerTable.cc e4f63f1d502d src/mem/ruby/system/CacheRecorder.hh e4f63f1d502d src/mem/ruby/system/CacheRecorder.cc e4f63f1d502d src/mem/ruby/system/DMASequencer.hh e4f63f1d502d src/mem/ruby/system/DMASequencer.cc e4f63f1d502d src/mem/ruby/system/RubyPort.hh e4f63f1d502d src/mem/ruby/system/RubyPort.cc e4f63f1d502d src/mem/ruby/system/Sequencer.hh e4f63f1d502d src/mem/ruby/system/Sequencer.cc e4f63f1d502d src/mem/ruby/system/System.cc e4f63f1d502d src/mem/slicc/ast/ActionDeclAST.py e4f63f1d502d src/mem/slicc/ast/InPortDeclAST.py e4f63f1d502d src/mem/slicc/ast/StallAndWaitStatementAST.py e4f63f1d502d src/mem/slicc/symbols/StateMachine.py e4f63f1d502d src/mem/slicc/symbols/Type.py e4f63f1d502d src/cpu/testers/rubytest/Check.hh e4f63f1d502d src/cpu/testers/rubytest/Check.cc e4f63f1d502d src/cpu/testers/rubytest/CheckTable.hh e4f63f1d502d src/cpu/testers/rubytest/CheckTable.cc e4f63f1d502d src/cpu/testers/rubytest/RubyTester.hh e4f63f1d502d src/mem/protocol/MESI_Three_Level-L0cache.sm e4f63f1d502d src/mem/protocol/MESI_Three_Level-L1cache.sm e4f63f1d502d src/mem/protocol/MESI_Three_Level-msg.sm e4f63f1d502d src/mem/protocol/MESI_Two_Level-L1cache.sm e4f63f1d502d src/mem/protocol/MESI_Two_Level-L2cache.sm e4f63f1d502d src/mem/protocol/MESI_Two_Level-dir.sm e4f63f1d502d src/mem/protocol/MESI_Two_Level-dma.sm e4f63f1d502d src/mem/protocol/MESI_Two_Level-msg.sm e4f63f1d502d src/mem/protocol/MI_example-cache.sm e4f63f1d502d src/mem/protocol/MI_example-dir.sm e4f63f1d502d src/mem/protocol/MI_example-dma.sm e4f63f1d502d src/mem/protocol/MI_example-msg.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_directory-L1cache.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_directory-L2cache.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_directory-dir.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_directory-dma.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_directory-msg.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_token-L1cache.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_token-L2cache.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_token-dir.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_token-dma.sm e4f63f1d502d src/mem/protocol/MOESI_CMP_token-msg.sm e4f63f1d502d src/mem/protocol/MOESI_hammer-cache.sm e4f63f1d502d src/mem/protocol/MOESI_hammer-dir.sm e4f63f1d502d src/mem/protocol/MOESI_hammer-dma.sm e4f63f1d502d src/mem/protocol/MOESI_hammer-msg.sm e4f63f1d502d src/mem/protocol/Network_test-cache.sm e4f63f1d502d src/mem/protocol/Network_test-dir.sm e4f63f1d502d src/mem/protocol/Network_test-msg.sm e4f63f1d502d src/mem/protocol/RubySlicc_ComponentMapping.sm e4f63f1d502d src/mem/protocol/RubySlicc_Defines.sm e4f63f1d502d src/mem/protocol/RubySlicc_Exports.sm e4f63f1d502d Diff: http://reviews.gem5.org/r/2919/diff/ Testing ------- Thanks, Nilay Vaish _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
