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src/dev/arm/hdlcd.hh (line 236) <http://reviews.gem5.org/r/2950/#comment5870> Can this be < 0? - Nilay Vaish On July 8, 2015, 12:47 p.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2950/ > ----------------------------------------------------------- > > (Updated July 8, 2015, 12:47 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10925:b0e1c8daa407 > --------------------------- > dev, arm: Rewrite the HDLCD controller > > Rewrite the HDLCD controller to use the new DMA engine and pixel > pump. This fixes several bugs in the current implementation: > > * Broken/missing interrupt support (VSync, underrun, DMA end) > * Fragile resolution changes (changing resolutions used > to cause assertion errors). > * Support for resolutions with a width that isn't divisible by 32. > * The pixel clock can now be set dynamically. > > This breaks checkpoint compatibility. Checkpoints can be upgraded with > the checkpoint conversion script. However, upgraded checkpoints won't > contain the state of the current frame. That means that HDLCD > controllers restoring from a converted checkpoint immediately start > drawing a new frame (i.e, expect timing differences). > > > Diffs > ----- > > src/dev/arm/RealView.py 5c76426fd9ee > src/dev/arm/hdlcd.hh 5c76426fd9ee > src/dev/arm/hdlcd.cc 5c76426fd9ee > util/cpt_upgraders/arm-hdlcd-upgrade.py PRE-CREATION > > Diff: http://reviews.gem5.org/r/2950/diff/ > > > Testing > ------- > > Tested manually using a minimal linux and test images. Specifically made sure > that checkpoints were taken mid-frame with buffers populated. Checkpoint > upgrader tested on multiple existing checkpoints. > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
