> On Oct. 30, 2015, 10:27 p.m., Andreas Hansson wrote: > > Impressive! > > > > Should it not be src/dev/gpu rather than src/gpu? > > > > Also, could you please make it a subdirectory in the gpu dir (as from > > above). There are more GPUs in this world...in fact there is already the > > NoMali gpu in src/dev/arm (we could move that if needed). If it's x86 > > specific, then perhaps src/dev/x86/gpu? > > Tony Gutierrez wrote: > We gave it its own directory because we don't consider it a device in the > classic sense. The GPU is a fully coherent compute module, and the only thing > that is device-like about it is the fact that it takes commands from the CPU > via ioctl() driver calls. It doesn't, e.g., have memory-mapped registers, etc. > > Brad Beckmann wrote: > Furthermore, our GPU is fully programmable and executes an ISA. It is > far more similar to gem5 CPUs than current gem5 devices. > > Andreas Hansson wrote: > Ok, sounds like you don't want it in the dev tree. Fair enough. > > Can you please make it a subdirectory then, along the lines of: > src/gpu/<something poetic here> > > We can also consider shifting the existing Mali model to src/gpu/mali.
I'm concerned that this gpu and the mali gpu are far different and putting them underneath the same directory would confuse users. Would it be better if we placed this code underneath src/compute-gpu? - Brad ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3189/#review7428 ----------------------------------------------------------- On Oct. 30, 2015, 9:52 p.m., Tony Gutierrez wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3189/ > ----------------------------------------------------------- > > (Updated Oct. 30, 2015, 9:52 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 11195:e9e245ab10f9 > --------------------------- > gpu: AMD's baseline GPU model > > This patch includes the entire baseline GPU model from AMD. The patch needs > to be checked in as one changeset, but let us know if you would prefer it to > be split for reviewing purposes. > > > Diffs > ----- > > src/mem/ruby/system/WeightedLRUPolicy.hh PRE-CREATION > src/mem/ruby/system/WeightedLRUPolicy.cc PRE-CREATION > src/mem/ruby/system/WeightedLRUReplacementPolicy.py PRE-CREATION > src/mem/slicc/symbols/StateMachine.py > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/slicc_interface/AbstractController.cc > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/slicc_interface/RubySlicc_Util.hh > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/structures/CacheMemory.hh > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/structures/CacheMemory.cc > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/structures/RubyCache.py > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/GPUCoalescer.hh PRE-CREATION > src/mem/ruby/system/GPUCoalescer.cc PRE-CREATION > src/mem/ruby/system/RubyPort.hh 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/RubyPort.cc 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/RubySystem.cc 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/SConscript 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/Sequencer.hh 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/Sequencer.cc 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/Sequencer.py 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/system/VIPERCoalescer.hh PRE-CREATION > src/mem/ruby/system/VIPERCoalescer.cc PRE-CREATION > src/gpu/rr_scheduling_policy.cc PRE-CREATION > src/gpu/schedule_stage.hh PRE-CREATION > src/gpu/schedule_stage.cc PRE-CREATION > src/gpu/scheduler.hh PRE-CREATION > src/gpu/scheduler.cc PRE-CREATION > src/gpu/scheduling_policy.hh PRE-CREATION > src/gpu/scoreboard_check_stage.hh PRE-CREATION > src/gpu/scoreboard_check_stage.cc PRE-CREATION > src/gpu/shader.hh PRE-CREATION > src/gpu/shader.cc PRE-CREATION > src/gpu/simple_pool_manager.hh PRE-CREATION > src/gpu/simple_pool_manager.cc PRE-CREATION > src/gpu/tlb_coalescer.hh PRE-CREATION > src/gpu/tlb_coalescer.cc PRE-CREATION > src/gpu/vector_register_file.hh PRE-CREATION > src/gpu/vector_register_file.cc PRE-CREATION > src/gpu/vector_register_state.hh PRE-CREATION > src/gpu/vector_register_state.cc PRE-CREATION > src/gpu/wavefront.hh PRE-CREATION > src/gpu/wavefront.cc PRE-CREATION > src/mem/protocol/GPU_RfO-SQC.sm PRE-CREATION > src/mem/protocol/GPU_RfO-TCC.sm PRE-CREATION > src/mem/protocol/GPU_RfO-TCCdir.sm PRE-CREATION > src/mem/protocol/GPU_RfO-TCP.sm PRE-CREATION > src/mem/protocol/GPU_RfO.slicc PRE-CREATION > src/mem/protocol/GPU_VIPER-SQC.sm PRE-CREATION > src/mem/protocol/GPU_VIPER-TCC.sm PRE-CREATION > src/mem/protocol/GPU_VIPER-TCP.sm PRE-CREATION > src/mem/protocol/GPU_VIPER.slicc PRE-CREATION > src/mem/protocol/GPU_VIPER_Baseline.slicc PRE-CREATION > src/mem/protocol/GPU_VIPER_Region-TCC.sm PRE-CREATION > src/mem/protocol/GPU_VIPER_Region.slicc PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-CorePair.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-L3cache.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-Region-CorePair.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-Region-dir.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-Region-msg.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-RegionBuffer.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-RegionDir.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-dir.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-msg.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base-probeFilter.sm PRE-CREATION > src/mem/protocol/MOESI_AMD_Base.slicc PRE-CREATION > src/mem/protocol/RubySlicc_ComponentMapping.sm > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/protocol/RubySlicc_Exports.sm > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/protocol/RubySlicc_Types.sm > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/protocol/SConsopts 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/SConscript 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/profiler/Profiler.cc 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/slicc_interface/AbstractCacheEntry.hh > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/mem/ruby/slicc_interface/AbstractController.hh > 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/gpu/misc.hh PRE-CREATION > src/gpu/ndrange.hh PRE-CREATION > src/gpu/of_scheduling_policy.hh PRE-CREATION > src/gpu/of_scheduling_policy.cc PRE-CREATION > src/gpu/pool_manager.hh PRE-CREATION > src/gpu/pool_manager.cc PRE-CREATION > src/gpu/qstruct.hh PRE-CREATION > src/gpu/rr_scheduling_policy.hh PRE-CREATION > src/gpu/gpu_mem_packet.cc PRE-CREATION > src/gpu/gpu_static_inst.hh PRE-CREATION > src/gpu/gpu_static_inst.cc PRE-CREATION > src/gpu/gpu_tlb.hh PRE-CREATION > src/gpu/gpu_tlb.cc PRE-CREATION > src/gpu/hsa_code.hh PRE-CREATION > src/gpu/hsa_kernel_info.hh PRE-CREATION > src/gpu/hsa_object.hh PRE-CREATION > src/gpu/hsa_object.cc PRE-CREATION > src/gpu/hsail_code.hh PRE-CREATION > src/gpu/hsail_code.cc PRE-CREATION > src/gpu/kernel_cfg.hh PRE-CREATION > src/gpu/kernel_cfg.cc PRE-CREATION > src/gpu/lds_state.hh PRE-CREATION > src/gpu/lds_state.cc PRE-CREATION > src/gpu/local_memory_pipeline.hh PRE-CREATION > src/gpu/local_memory_pipeline.cc PRE-CREATION > src/gpu/arch/hsail/insts/mem.cc PRE-CREATION > src/gpu/arch/hsail/insts/mem_impl.hh PRE-CREATION > src/gpu/arch/hsail/insts/pseudo_inst.cc PRE-CREATION > src/gpu/arch/hsail/operand.hh PRE-CREATION > src/gpu/arch/hsail/operand.cc PRE-CREATION > src/gpu/arch/hsail/types.hh PRE-CREATION > src/gpu/brig_object.hh PRE-CREATION > src/gpu/brig_object.cc PRE-CREATION > src/gpu/cl_driver.hh PRE-CREATION > src/gpu/cl_driver.cc PRE-CREATION > src/gpu/code_enums.hh PRE-CREATION > src/gpu/compute_unit.hh PRE-CREATION > src/gpu/compute_unit.cc PRE-CREATION > src/gpu/condition_register_state.hh PRE-CREATION > src/gpu/condition_register_state.cc PRE-CREATION > src/gpu/dispatcher.hh PRE-CREATION > src/gpu/dispatcher.cc PRE-CREATION > src/gpu/exec_stage.hh PRE-CREATION > src/gpu/exec_stage.cc PRE-CREATION > src/gpu/fetch_stage.hh PRE-CREATION > src/gpu/fetch_stage.cc PRE-CREATION > src/gpu/fetch_unit.hh PRE-CREATION > src/gpu/fetch_unit.cc PRE-CREATION > src/gpu/global_memory_pipeline.hh PRE-CREATION > src/gpu/global_memory_pipeline.cc PRE-CREATION > src/gpu/gpu_mem_packet.hh PRE-CREATION > SConstruct 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > build_opts/gpu_RfO PRE-CREATION > build_opts/gpu_VIPER PRE-CREATION > build_opts/gpu_VIPER_Baseline PRE-CREATION > build_opts/gpu_VIPER_Region PRE-CREATION > configs/common/GPUTLBConfig.py PRE-CREATION > configs/common/GPUTLBOptions.py PRE-CREATION > configs/example/apu_se.py PRE-CREATION > configs/ruby/AMD_Base_Constructor.py PRE-CREATION > configs/ruby/GPU_RfO.py PRE-CREATION > configs/ruby/GPU_VIPER.py PRE-CREATION > configs/ruby/GPU_VIPER_Baseline.py PRE-CREATION > configs/ruby/GPU_VIPER_Region.py PRE-CREATION > configs/ruby/MOESI_AMD_Base.py PRE-CREATION > configs/ruby/MemCntrlConstructor.py PRE-CREATION > src/SConscript 4daf60db14d794e2344a6c86a93bdd8273bc5bb6 > src/gpu/GPU.py PRE-CREATION > src/gpu/LdsState.py PRE-CREATION > src/gpu/SConscript PRE-CREATION > src/gpu/X86GPUTLB.py PRE-CREATION > src/gpu/arch/SConscript PRE-CREATION > src/gpu/arch/hsail/Brig.h PRE-CREATION > src/gpu/arch/hsail/Brig_new.hpp PRE-CREATION > src/gpu/arch/hsail/SConscript PRE-CREATION > src/gpu/arch/hsail/SConsopts PRE-CREATION > src/gpu/arch/hsail/decoder.hh PRE-CREATION > src/gpu/arch/hsail/gen.py PRE-CREATION > src/gpu/arch/hsail/insts/branch.hh PRE-CREATION > src/gpu/arch/hsail/insts/branch.cc PRE-CREATION > src/gpu/arch/hsail/insts/decl.hh PRE-CREATION > src/gpu/arch/hsail/insts/gpu_static_inst.hh PRE-CREATION > src/gpu/arch/hsail/insts/gpu_static_inst.cc PRE-CREATION > src/gpu/arch/hsail/insts/main.cc PRE-CREATION > src/gpu/arch/hsail/insts/mem.hh PRE-CREATION > > Diff: http://reviews.gem5.org/r/3189/diff/ > > > Testing > ------- > > > Thanks, > > Tony Gutierrez > > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
