----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3512/ -----------------------------------------------------------
Review request for Default. Repository: gem5 Description ------- arm: Fix EL perceived at TLB for address translation instructions During address translation instructions (such as AT S1E1R_Xt) the exception level can be different than the current exception level. This patch fixes how the TLB determines what EL to use during these instructions. Diffs ----- src/arch/arm/isa.cc fdfc2455b091b221cd95aaf04e367dea68cd1b3f src/arch/arm/tlb.hh fdfc2455b091b221cd95aaf04e367dea68cd1b3f src/arch/arm/tlb.cc fdfc2455b091b221cd95aaf04e367dea68cd1b3f Diff: http://reviews.gem5.org/r/3512/diff/ Testing ------- Thanks, Curtis Dunham _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
