[gem5-dev] changeset in gem5: arm: correctly assign faulting IPA's to HPFAR...

[Dylan Johnson]

changeset 83784c48fb73 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=83784c48fb73
description:
        arm: correctly assign faulting IPA's to HPFAR_EL2

        This patch corrects IPA reporting if the translation faults in a
        stage 2 lookup.

        Change-Id: I0b914527f8a9f98a5e980a131cf9d03e5584b4e9

diffstat:

 src/arch/arm/faults.cc |  12 +++++++++++-
 1 files changed, 11 insertions(+), 1 deletions(-)

diffs (22 lines):

diff -r bbd8448f104e -r 83784c48fb73 src/arch/arm/faults.cc
--- a/src/arch/arm/faults.cc    Tue Aug 02 10:38:03 2016 +0100
+++ b/src/arch/arm/faults.cc    Tue Aug 02 10:38:03 2016 +0100
@@ -969,7 +969,17 @@
     } else {  // AArch64
         // Set the FAR register.  Nothing else to do if we are in AArch64 state
         // because the syndrome register has already been set inside invoke64()
-        tc->setMiscReg(AbortFault<T>::getFaultAddrReg64(), faultAddr);
+        if (stage2) {
+            // stage 2 fault, set HPFAR_EL2 to the faulting IPA
+            // and FAR_EL2 to the Original VA
+            tc->setMiscReg(AbortFault<T>::getFaultAddrReg64(), OVAddr);
+            tc->setMiscReg(MISCREG_HPFAR_EL2, bits(faultAddr, 47, 12) << 4);
+
+            DPRINTF(Faults, "Abort Fault (Stage 2) VA: 0x%x IPA: 0x%x\n",
+                    OVAddr, faultAddr);
+        } else {
+            tc->setMiscReg(AbortFault<T>::getFaultAddrReg64(), faultAddr);
+        }
     }
 }
 
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