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(Updated Jan. 30, 2017, 3:11 p.m.) Review request for Default. Repository: gem5 Description (updated) ------- misc: Clean up and complete the gem5<->SystemC-TLM bridge [5/6] The current TLM bridge only provides a Slave Port that allows the gem5 world to send request to the SystemC world. This patch series refractors and cleans up the existing code, and adds a Master Port that allows the SystemC world to send requests to the gem5 world. This patch: * Introduce transactor modules that represent the gem5 ports in the SystemC world. * Update the SimControl module and let it keep track of the gem5 ports. Diffs ----- util/tlm/sc_slave_port.hh PRE-CREATION util/tlm/sim_control.cc PRE-CREATION util/tlm/slave_transactor.cc PRE-CREATION util/tlm/slave_transactor.hh PRE-CREATION util/tlm/sim_control_if.hh PRE-CREATION util/tlm/master_transactor.cc PRE-CREATION util/tlm/sc_master_port.hh PRE-CREATION util/tlm/examples/slave_port/tlm.py PRE-CREATION util/tlm/master_transactor.hh PRE-CREATION util/tlm/examples/master_port/tlm.py PRE-CREATION util/tlm/examples/slave_port/main.cc PRE-CREATION util/tlm/examples/master_port/main.cc PRE-CREATION util/tlm/sim_control.hh PRE-CREATION util/tlm/sc_slave_port.cc PRE-CREATION util/tlm/sc_master_port.cc PRE-CREATION Diff: http://reviews.gem5.org/r/3775/diff/ Testing ------- Thanks, Christian Menard _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
