Alec Roelke has uploaded this change for review. (
https://gem5-review.googlesource.com/2303
Change subject: riscv: fix compatibility with Linux toolchain
......................................................................
riscv: fix compatibility with Linux toolchain
Previously, RISC-V in gem5 only supported RISC-V's Newlib toolchain
(riscv64-unknown-elf-*) due to incorrect assumptions made in the initial
setup of the user stack in SE mode. This patch fixes that by referring
to the RISC-V proxy kernel code (https://github.com/riscv/riscv-pk) and
setting up the stack according to how it does it. Now binaries compiled
using the Linux toolchain (riscv64-unknown-linux-gnu-*) will run as
well.
Change-Id: I444b4ce8493fdae57b69696c3d14d914996c09f7
---
M src/arch/riscv/process.cc
M src/arch/riscv/process.hh
M tests/test-progs/insttest/src/riscv/Makefile
3 files changed, 121 insertions(+), 130 deletions(-)
diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc
index 8b168cb..5349b00 100644
--- a/src/arch/riscv/process.cc
+++ b/src/arch/riscv/process.cc
@@ -33,6 +33,11 @@
*/
#include "arch/riscv/process.hh"
+#include <algorithm>
+#include <cstddef>
+#include <iostream>
+#include <map>
+#include <string>
#include <vector>
#include "arch/riscv/isa_traits.hh"
@@ -40,8 +45,9 @@
#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
-#include "debug/Loader.hh"
+#include "debug/Stack.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process.hh"
#include "sim/process_impl.hh"
@@ -54,18 +60,15 @@
RiscvProcess::RiscvProcess(ProcessParams * params,
ObjectFile *objFile) : Process(params, objFile)
{
- // Set up stack. On RISC-V, stack starts at the top of kuseg
- // user address space. RISC-V stack grows down from here
- memState->stackBase = (Addr)0x7FFFFFFF;
-
- // Set pointer for next thread stack. Reserve 8M for main stack.
- memState->nextThreadStackBase = memState->stackBase - (8 * 1024 *
1024);
-
- // Set up break point (Top of Heap)
- memState->brkPoint = objFile->bssBase() + objFile->bssSize();
-
- // Set up region for mmaps. Start it 1GB above the top of the heap.
- memState->mmapEnd = memState->brkPoint + 0x40000000L;
+ // The process for initializing memory and the stack was based on the
code
+ // for RISC-V's proxy kernel, which can be found at:
+ // https://github.com/riscv/riscv-pk
+ const Addr memBase = 0x80000000;
+ memState->stackBase = memBase;
+ memState->nextThreadStackBase = memState->stackBase + PageBytes * 64;
+ memState->mmapEnd = memBase;
+ memState->brkPoint = roundUp(objFile->bssBase() + objFile->bssSize(),
+ PageBytes);
}
void
@@ -76,144 +79,126 @@
argsInit<uint64_t>(PageBytes);
}
+void
+RiscvProcess::pushOntoStack(Addr& sp, const uint8_t* data, size_t size)
const
+{
+ initVirtMem.writeBlob(sp, data, size);
+ sp += size;
+}
+
template<class IntType> void
RiscvProcess::argsInit(int pageSize)
{
updateBias();
-
- // load object file into target memory
objFile->loadSections(initVirtMem);
+ ElfObject* elfObject = dynamic_cast<ElfObject*>(objFile);
+ memState->stackMin = memState->stackBase;
- typedef AuxVector<IntType> auxv_t;
- vector<auxv_t> auxv;
- ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
- if (elfObject) {
- // Set the system page size
- auxv.push_back(auxv_t(M5_AT_PAGESZ, RiscvISA::PageBytes));
- // Set the frequency at which time() increments
- auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
- // For statically linked executables, this is the virtual
- // address of the program header tables if they appear in the
- // executable image.
- auxv.push_back(auxv_t(M5_AT_PHDR,
elfObject->programHeaderTable()));
- DPRINTF(Loader, "auxv at PHDR %08p\n",
- elfObject->programHeaderTable());
- // This is the size of a program header entry from the elf file.
- auxv.push_back(auxv_t(M5_AT_PHENT,
elfObject->programHeaderSize()));
- // This is the number of program headers from the original elf
file.
- auxv.push_back(auxv_t(M5_AT_PHNUM,
elfObject->programHeaderCount()));
- auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
- //The entry point to the program
- auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
- //Different user and group IDs
- auxv.push_back(auxv_t(M5_AT_UID, uid()));
- auxv.push_back(auxv_t(M5_AT_EUID, euid()));
- auxv.push_back(auxv_t(M5_AT_GID, gid()));
- auxv.push_back(auxv_t(M5_AT_EGID, egid()));
+ // Determine stack size and populate auxv
+ Addr stackTop = memState->stackMin;
+ for (const string& arg: argv)
+ stackTop -= arg.size() + 1;
+ for (const string& env: envp)
+ stackTop -= env.size() + 1;
+ stackTop &= -sizeof(Addr);
+
+ vector<AuxVector<IntType>> auxv;
+ if (elfObject != nullptr) {
+ auxv.push_back({M5_AT_ENTRY, objFile->entryPoint()});
+ auxv.push_back({M5_AT_PHNUM, elfObject->programHeaderCount()});
+ auxv.push_back({M5_AT_PHENT, elfObject->programHeaderSize()});
+ auxv.push_back({M5_AT_PHDR, elfObject->programHeaderTable()});
+ auxv.push_back({M5_AT_PAGESZ, PageBytes});
+ auxv.push_back({M5_AT_SECURE, 0});
+ auxv.push_back({M5_AT_RANDOM, stackTop});
+ auxv.push_back({M5_AT_NULL, 0});
}
+ stackTop -= (1 + argv.size()) * sizeof(Addr) +
+ (1 + envp.size()) * sizeof(Addr) +
+ sizeof(Addr) + 2 * sizeof(IntType) * auxv.size();
+ stackTop &= -2*sizeof(Addr);
+ memState->stackSize = memState->stackBase - stackTop;
+ allocateMem(roundDown(stackTop, pageSize),
+ roundUp(memState->stackSize, pageSize));
- const IntType zero = 0;
- IntType argc = htog((IntType)argv.size());
- int argv_array_size = sizeof(Addr) * argv.size();
- int arg_data_size = 0;
- for (string arg: argv)
- arg_data_size += arg.size() + 1;
- int envp_array_size = sizeof(Addr) * envp.size();
- int env_data_size = 0;
- for (string env: envp)
- env_data_size += env.size() + 1;
- int auxv_array_size = 2 * sizeof(IntType)*auxv.size();
+ // Copy argv to stack
+ vector<Addr> argPointers;
+ for (const string& arg: argv) {
+ memState->stackMin -= arg.size() + 1;
+ initVirtMem.writeString(memState->stackMin, arg.c_str());
+ argPointers.push_back(memState->stackMin);
- memState->stackSize = sizeof(IntType) + argv_array_size + 2 *
- sizeof(Addr) + arg_data_size + 2 * sizeof(Addr);
- if (!envp.empty()) {
- memState->stackSize += 2 * sizeof(Addr) + envp_array_size + 2 *
- sizeof(Addr) + env_data_size;
+ string wrote;
+ initVirtMem.readString(wrote, argPointers.back());
+ DPRINTF(Stack, "Wrote arg \"%s\" to address %p\n",
+ wrote, (void*)memState->stackMin);
}
- if (!auxv.empty())
- memState->stackSize += 2 * sizeof(Addr) + auxv_array_size;
- memState->stackMin = roundDown(memState->stackBase -
memState->stackSize,
- pageSize);
- allocateMem(memState->stackMin, roundUp(memState->stackSize,
pageSize));
+ argPointers.push_back(0);
- Addr argv_array_base = memState->stackMin + sizeof(IntType);
- Addr arg_data_base = argv_array_base + argv_array_size + 2 *
sizeof(Addr);
- Addr envp_array_base = arg_data_base + arg_data_size;
- if (!envp.empty())
- envp_array_base += 2 * sizeof(Addr);
- Addr env_data_base = envp_array_base + envp_array_size;
- if (!envp.empty())
- env_data_base += 2 * sizeof(Addr);
-
- vector<Addr> arg_pointers;
- if (!argv.empty()) {
- arg_pointers.push_back(arg_data_base);
- for (int i = 0; i < argv.size() - 1; i++) {
- arg_pointers.push_back(arg_pointers[i] + argv[i].size() + 1);
- }
+ // Copy envp to stack
+ vector<Addr> envPointers;
+ for (const string& env: envp) {
+ memState->stackMin -= env.size() + 1;
+ initVirtMem.writeString(memState->stackMin, env.c_str());
+ envPointers.push_back(memState->stackMin);
+ DPRINTF(Stack, "Wrote env \"%s\" to address %p\n",
+ env, (void*)memState->stackMin);
}
+ envPointers.push_back(0);
- vector<Addr> env_pointers;
- if (!envp.empty()) {
- env_pointers.push_back(env_data_base);
- for (int i = 0; i < envp.size() - 1; i++) {
- env_pointers.push_back(env_pointers[i] + envp[i].size() + 1);
- }
- }
+ // Align stack
+ memState->stackMin &= -sizeof(Addr);
+ // Calculate bottom of stack
+ memState->stackMin -= (1 + argv.size()) * sizeof(Addr) +
+ (1 + envp.size()) * sizeof(Addr) +
+ sizeof(Addr) + 2 * sizeof(IntType) * auxv.size();
+ memState->stackMin &= -2*sizeof(Addr);
Addr sp = memState->stackMin;
- initVirtMem.writeBlob(sp, (uint8_t *)&argc, sizeof(IntType));
- sp += sizeof(IntType);
- for (Addr arg_pointer: arg_pointers) {
- initVirtMem.writeBlob(sp, (uint8_t *)&arg_pointer, sizeof(Addr));
- sp += sizeof(Addr);
+
+ // Push argc and argv pointers onto stack
+ IntType argc = htog((IntType)argv.size());
+ DPRINTF(Stack, "Wrote argc %d to address %p\n",
+ argv.size(), (void*)sp);
+ pushOntoStack(sp, (uint8_t*)&argc, sizeof(IntType));
+ for (const Addr& argPointer: argPointers) {
+ DPRINTF(Stack, "Wrote argv pointer %p to address %p\n",
+ (void*)argPointer, (void*)sp);
+ pushOntoStack(sp, (uint8_t*)&argPointer, sizeof(Addr));
}
- for (int i = 0; i < 2; i++) {
- initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr));
- sp += sizeof(Addr);
+
+ // Push env pointers onto stack
+ for (const Addr& envPointer: envPointers) {
+ DPRINTF(Stack, "Wrote envp pointer %p to address %p\n",
+ (void*)envPointer, (void*)sp);
+ pushOntoStack(sp, (uint8_t*)&envPointer, sizeof(Addr));
}
- for (int i = 0; i < argv.size(); i++) {
- initVirtMem.writeString(sp, argv[i].c_str());
- sp += argv[i].size() + 1;
- }
- if (!envp.empty()) {
- for (int i = 0; i < 2; i++) {
- initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr));
- sp += sizeof(Addr);
- }
- }
- for (Addr env_pointer: env_pointers)
- initVirtMem.writeBlob(sp, (uint8_t *)&env_pointer, sizeof(Addr));
- if (!envp.empty()) {
- for (int i = 0; i < 2; i++) {
- initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr));
- sp += sizeof(Addr);
- }
- }
- for (int i = 0; i < envp.size(); i++) {
- initVirtMem.writeString(sp, envp[i].c_str());
- sp += envp[i].size() + 1;
- }
- if (!auxv.empty()) {
- for (int i = 0; i < 2; i++) {
- initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr));
- sp += sizeof(Addr);
- }
- }
- for (auxv_t aux: auxv) {
- initVirtMem.writeBlob(sp, (uint8_t *)&aux.a_type, sizeof(IntType));
- initVirtMem.writeBlob(sp + sizeof(IntType), (uint8_t *)&aux.a_val,
- sizeof(IntType));
- sp += 2 * sizeof(IntType);
- }
- for (int i = 0; i < 2; i++) {
- initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr));
- sp += sizeof(Addr);
+
+ // Push aux vector onto stack
+ std::map<IntType, string> aux_keys = {
+ {M5_AT_ENTRY, "M5_AT_ENTRY"},
+ {M5_AT_PHNUM, "M5_AT_PHNUM"},
+ {M5_AT_PHENT, "M5_AT_PHENT"},
+ {M5_AT_PHDR, "M5_AT_PHDR"},
+ {M5_AT_PAGESZ, "M5_AT_PAGESZ"},
+ {M5_AT_SECURE, "M5_AT_SECURE"},
+ {M5_AT_RANDOM, "M5_AT_RANDOM"},
+ {M5_AT_NULL, "M5_AT_NULL"}
+ };
+ for (const AuxVector<IntType>& aux: auxv) {
+ DPRINTF(Stack, "Wrote aux key %s to address %p\n",
+ aux_keys[aux.a_type], (void*)sp);
+ pushOntoStack(sp, (uint8_t*)&aux.a_type, sizeof(IntType));
+ DPRINTF(Stack, "Wrote aux value %x to address %p\n",
+ aux.a_val, (void*)sp);
+ pushOntoStack(sp, (uint8_t*)&aux.a_val, sizeof(IntType));
}
ThreadContext *tc = system->getThreadContext(contextIds[0]);
tc->setIntReg(StackPointerReg, memState->stackMin);
tc->pcState(getStartPC());
+
+ memState->stackMin = roundDown(memState->stackMin, pageSize);
}
RiscvISA::IntReg
diff --git a/src/arch/riscv/process.hh b/src/arch/riscv/process.hh
index 8275a11..a62565f 100644
--- a/src/arch/riscv/process.hh
+++ b/src/arch/riscv/process.hh
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2006 The Regents of The University of Michigan
+ * Copyright (c) 2017 The University of Virginia
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -27,11 +28,13 @@
*
* Authors: Gabe Black
* Ali Saidi
+ * Alec Roelke
*/
#ifndef __RISCV_PROCESS_HH__
#define __RISCV_PROCESS_HH__
+#include <cstdlib>
#include <string>
#include <vector>
@@ -43,6 +46,9 @@
class RiscvProcess : public Process
{
+ private:
+ void pushOntoStack(Addr& sp, const uint8_t* data, size_t size) const;
+
protected:
RiscvProcess(ProcessParams * params, ObjectFile *objFile);
diff --git a/tests/test-progs/insttest/src/riscv/Makefile
b/tests/test-progs/insttest/src/riscv/Makefile
index 5aa8a7a..c493b40 100644
--- a/tests/test-progs/insttest/src/riscv/Makefile
+++ b/tests/test-progs/insttest/src/riscv/Makefile
@@ -26,7 +26,7 @@
#
# Authors: Alec Roelke
-CXX=riscv64-unknown-elf-g++
+CXX=riscv64-unknown-linux-gnu-g++
CFLAGS=--std=c++11 -O3 -static
TARGETS=rv64i rv64m rv64a rv64f rv64d
--
To view, visit https://gem5-review.googlesource.com/2303
To unsubscribe, visit https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I444b4ce8493fdae57b69696c3d14d914996c09f7
Gerrit-Change-Number: 2303
Gerrit-PatchSet: 1
Gerrit-Owner: Alec Roelke <ar...@virginia.edu>
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