Alec Roelke has uploaded this change for review. (
https://gem5-review.googlesource.com/7181
Change subject: arch-riscv: Change AMO request flags
......................................................................
arch-riscv: Change AMO request flags
This patch adds the LOCKED_RMW flag to atomic memory operations to
ensure that they are atomic. It does not change their memory ordering
flags.
Change-Id: Ibc01091f83e3ff7c5b1e6153beb62291eba9dde4
---
M src/arch/riscv/isa/formats/amo.isa
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/arch/riscv/isa/formats/amo.isa
b/src/arch/riscv/isa/formats/amo.isa
index e3be237..241dab4 100644
--- a/src/arch/riscv/isa/formats/amo.isa
+++ b/src/arch/riscv/isa/formats/amo.isa
@@ -43,8 +43,7 @@
// Constructor
%(class_name)s(ExtMachInst machInst);
- protected:
-
+ protected:
class %(class_name)sLoad : public %(base_class)sMicro
{
public:
@@ -101,8 +100,9 @@
%(constructor)s;
flags[IsFirstMicroop] = true;
flags[IsDelayedCommit] = true;
+ memAccessFlags = memAccessFlags | Request::LOCKED_RMW;
if (AQ)
- memAccessFlags = Request::ACQUIRE;
+ memAccessFlags = memAccessFlags | Request::ACQUIRE;
}
}};
@@ -114,8 +114,9 @@
%(constructor)s;
flags[IsLastMicroop] = true;
flags[IsNonSpeculative] = true;
+ memAccessFlags = memAccessFlags | Request::LOCKED_RMW;
if (RL)
- memAccessFlags = Request::RELEASE;
+ memAccessFlags = memAccessFlags | Request::RELEASE;
}
}};
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ibc01091f83e3ff7c5b1e6153beb62291eba9dde4
Gerrit-Change-Number: 7181
Gerrit-PatchSet: 1
Gerrit-Owner: Alec Roelke <ar...@virginia.edu>
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