Gabe Black has submitted this change and it was merged. (
https://gem5-review.googlesource.com/6981 )
Change subject: arch,mem: Move page table construction into the arch
classes.
......................................................................
arch,mem: Move page table construction into the arch classes.
This gets rid of an awkward NoArchPageTable class, and also gives the
arch a place to inject ISA specific parameters (specifically page size)
without having to have TheISA:: in the generic version of these types.
Change-Id: I1412f303460d5c43dafdb9b3cd07af81c908a441
Reviewed-on: https://gem5-review.googlesource.com/6981
Reviewed-by: Alexandru Duțu <alexandru.d...@amd.com>
Maintainer: Gabe Black <gabebl...@google.com>
---
M src/arch/alpha/process.cc
M src/arch/alpha/process.hh
M src/arch/arm/process.cc
M src/arch/arm/process.hh
M src/arch/mips/process.cc
M src/arch/mips/process.hh
M src/arch/power/process.cc
M src/arch/power/process.hh
M src/arch/riscv/process.cc
M src/arch/riscv/process.hh
M src/arch/sparc/process.cc
M src/arch/sparc/process.hh
M src/arch/x86/process.cc
M src/arch/x86/process.hh
M src/mem/page_table.hh
M src/sim/process.cc
M src/sim/process.hh
17 files changed, 45 insertions(+), 61 deletions(-)
Approvals:
Alexandru Duțu: Looks good to me, approved
Gabe Black: Looks good to me, approved
diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index 58fe0bd..3cc0b0d 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -38,6 +38,7 @@
#include "cpu/thread_context.hh"
#include "debug/Loader.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/byteswap.hh"
#include "sim/process_impl.hh"
@@ -48,8 +49,9 @@
using namespace std;
AlphaProcess::AlphaProcess(ProcessParams *params, ObjectFile *objFile)
- : Process(params, objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid),
objFile)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
Addr brk_point = objFile->dataBase() + objFile->dataSize() +
objFile->bssSize();
brk_point = roundUp(brk_point, PageBytes);
diff --git a/src/arch/alpha/process.hh b/src/arch/alpha/process.hh
index a02b8ce..28ecd68 100644
--- a/src/arch/alpha/process.hh
+++ b/src/arch/alpha/process.hh
@@ -61,7 +61,4 @@
virtual bool mmapGrowsDown() const override { return false; }
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __ARCH_ALPHA_PROCESS_HH__
diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc
index dcc9145..b64579a 100644
--- a/src/arch/arm/process.cc
+++ b/src/arch/arm/process.cc
@@ -51,6 +51,7 @@
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/byteswap.hh"
#include "sim/process_impl.hh"
@@ -62,8 +63,10 @@
ArmProcess::ArmProcess(ProcessParams *params, ObjectFile *objFile,
ObjectFile::Arch _arch)
- : Process(params, objFile), arch(_arch)
+ : Process(params, new FuncPageTable(params->name, params->pid),
objFile),
+ arch(_arch)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
}
ArmProcess32::ArmProcess32(ProcessParams *params, ObjectFile *objFile,
diff --git a/src/arch/arm/process.hh b/src/arch/arm/process.hh
index f8e6542..f4f0874 100644
--- a/src/arch/arm/process.hh
+++ b/src/arch/arm/process.hh
@@ -95,8 +95,5 @@
void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __ARM_PROCESS_HH__
diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc
index 4d0d5e3..f3b1108 100644
--- a/src/arch/mips/process.cc
+++ b/src/arch/mips/process.cc
@@ -39,6 +39,7 @@
#include "cpu/thread_context.hh"
#include "debug/Loader.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process.hh"
#include "sim/process_impl.hh"
@@ -48,9 +49,10 @@
using namespace std;
using namespace MipsISA;
-MipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile)
- : Process(params, objFile)
+MipsProcess::MipsProcess(ProcessParams *params, ObjectFile *objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid),
objFile)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Set up stack. On MIPS, stack starts at the top of kuseg
// user address space. MIPS stack grows down from here
Addr stack_base = 0x7FFFFFFF;
diff --git a/src/arch/mips/process.hh b/src/arch/mips/process.hh
index ed6561c..e9e0585 100644
--- a/src/arch/mips/process.hh
+++ b/src/arch/mips/process.hh
@@ -58,8 +58,4 @@
void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
-
#endif // __MIPS_PROCESS_HH__
diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc
index 4a34dec..87e5bac 100644
--- a/src/arch/power/process.cc
+++ b/src/arch/power/process.cc
@@ -40,6 +40,7 @@
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process_impl.hh"
#include "sim/syscall_return.hh"
@@ -49,8 +50,9 @@
using namespace PowerISA;
PowerProcess::PowerProcess(ProcessParams *params, ObjectFile *objFile)
- : Process(params, objFile)
+ : Process(params, new FuncPageTable(params->name, params->pid),
objFile)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Set up break point (Top of Heap)
Addr brk_point = objFile->dataBase() + objFile->dataSize() +
objFile->bssSize();
diff --git a/src/arch/power/process.hh b/src/arch/power/process.hh
index 08efdfe..348e375 100644
--- a/src/arch/power/process.hh
+++ b/src/arch/power/process.hh
@@ -57,8 +57,5 @@
void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __POWER_PROCESS_HH__
diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc
index b4fe1ee..88a093a 100644
--- a/src/arch/riscv/process.cc
+++ b/src/arch/riscv/process.cc
@@ -59,9 +59,10 @@
using namespace std;
using namespace RiscvISA;
-RiscvProcess::RiscvProcess(ProcessParams * params,
- ObjectFile *objFile) : Process(params, objFile)
+RiscvProcess::RiscvProcess(ProcessParams *params, ObjectFile *objFile) :
+ Process(params, new FuncPageTable(params->name, params->pid),
objFile)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
const Addr stack_base = 0x7FFFFFFFFFFFFFFFL;
const Addr max_stack_size = 8 * 1024 * 1024;
const Addr next_thread_stack_base = stack_base - max_stack_size;
diff --git a/src/arch/riscv/process.hh b/src/arch/riscv/process.hh
index 2a27f35..bda278e 100644
--- a/src/arch/riscv/process.hh
+++ b/src/arch/riscv/process.hh
@@ -65,8 +65,4 @@
virtual bool mmapGrowsDown() const override { return false; }
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
-
#endif // __RISCV_PROCESS_HH__
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index da7032f..fe91589 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -42,6 +42,7 @@
#include "cpu/thread_context.hh"
#include "debug/Stack.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process_impl.hh"
#include "sim/syscall_return.hh"
@@ -53,10 +54,12 @@
static const int FirstArgumentReg = 8;
-SparcProcess::SparcProcess(ProcessParams * params, ObjectFile *objFile,
+SparcProcess::SparcProcess(ProcessParams *params, ObjectFile *objFile,
Addr _StackBias)
- : Process(params, objFile), StackBias(_StackBias)
+ : Process(params, new FuncPageTable(params->name, params->pid),
objFile),
+ StackBias(_StackBias)
{
+ fatal_if(!params->useArchPT, "Arch page tables not implemented.");
// Initialize these to 0s
fillStart = 0;
spillStart = 0;
diff --git a/src/arch/sparc/process.hh b/src/arch/sparc/process.hh
index 6a203a4..d7e0967 100644
--- a/src/arch/sparc/process.hh
+++ b/src/arch/sparc/process.hh
@@ -160,7 +160,4 @@
void setSyscallArg(ThreadContext *tc, int i, SparcISA::IntReg val);
};
-/* No architectural page table defined for this ISA */
-typedef NoArchPageTable ArchPageTable;
-
#endif // __SPARC_PROCESS_HH__
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index 1ad1315..f11cc34 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -60,6 +60,7 @@
#include "debug/Stack.hh"
#include "mem/multi_level_page_table.hh"
#include "mem/page_table.hh"
+#include "params/Process.hh"
#include "sim/aux_vector.hh"
#include "sim/process_impl.hh"
#include "sim/syscall_desc.hh"
@@ -95,10 +96,16 @@
static const int NumArgumentRegs32 M5_VAR_USED =
sizeof(ArgumentReg) / sizeof(const int);
-X86Process::X86Process(ProcessParams * params, ObjectFile *objFile,
+X86Process::X86Process(ProcessParams *params, ObjectFile *objFile,
SyscallDesc *_syscallDescs, int _numSyscallDescs)
- : Process(params, objFile), syscallDescs(_syscallDescs),
- numSyscallDescs(_numSyscallDescs)
+ : Process(params, params->useArchPT ?
+ static_cast<PageTableBase *>(
+ new ArchPageTable(params->name, params->pid,
+ params->system)) :
+ static_cast<PageTableBase *>(
+ new FuncPageTable(params->name,
params->pid)),
+ objFile),
+ syscallDescs(_syscallDescs), numSyscallDescs(_numSyscallDescs)
{
}
diff --git a/src/arch/x86/process.hh b/src/arch/x86/process.hh
index 3eb9620..e5e1857 100644
--- a/src/arch/x86/process.hh
+++ b/src/arch/x86/process.hh
@@ -59,6 +59,14 @@
class X86Process : public Process
{
protected:
+ /**
+ * Declaration of architectural page table for x86.
+ *
+ * These page tables are stored in system memory and respect x86
+ * specification.
+ */
+ typedef MultiLevelPageTable<PageTableOps> ArchPageTable;
+
Addr _gdtStart;
Addr _gdtSize;
@@ -189,14 +197,6 @@
Process *process, TheISA::IntReg flags) override;
};
- /**
- * Declaration of architectural page table for x86.
- *
- * These page tables are stored in system memory and respect x86
- * specification.
- */
- typedef MultiLevelPageTable<PageTableOps> ArchPageTable;
-
}
#endif // __ARCH_X86_PROCESS_HH__
diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh
index 0d0a75e..883b47c 100644
--- a/src/mem/page_table.hh
+++ b/src/mem/page_table.hh
@@ -246,19 +246,4 @@
void getMappings(std::vector<std::pair<Addr, Addr>> *addr_maps)
override;
};
-/**
- * Faux page table class indended to stop the usage of
- * an architectural page table, when there is none defined
- * for a particular ISA.
- */
-class NoArchPageTable : public FuncPageTable
-{
- public:
- NoArchPageTable(const std::string &__name, uint64_t _pid, System *_sys,
- Addr _pageSize = TheISA::PageBytes) : FuncPageTable(__name,
_pid)
- {
- fatal("No architectural page table defined for this ISA.\n");
- }
-};
-
#endif // __MEM_PAGE_TABLE_HH__
diff --git a/src/sim/process.cc b/src/sim/process.cc
index ee90667..77d7903 100644
--- a/src/sim/process.cc
+++ b/src/sim/process.cc
@@ -101,14 +101,12 @@
using namespace std;
using namespace TheISA;
-Process::Process(ProcessParams * params, ObjectFile * obj_file)
+Process::Process(ProcessParams *params, PageTableBase *pTable,
+ ObjectFile *obj_file)
: SimObject(params), system(params->system),
useArchPT(params->useArchPT),
kvmInSE(params->kvmInSE),
- pTable(useArchPT ?
- static_cast<PageTableBase *>(new ArchPageTable(name(), params->pid,
- system)) :
- static_cast<PageTableBase *>(new FuncPageTable(name(),
params->pid))),
+ pTable(pTable),
initVirtMem(system->getSystemPort(), this,
SETranslatingPortProxy::Always),
objFile(obj_file),
diff --git a/src/sim/process.hh b/src/sim/process.hh
index e4a52e3..6d465ac 100644
--- a/src/sim/process.hh
+++ b/src/sim/process.hh
@@ -63,7 +63,8 @@
class Process : public SimObject
{
public:
- Process(ProcessParams *params, ObjectFile *obj_file);
+ Process(ProcessParams *params, PageTableBase *pTable,
+ ObjectFile *obj_file);
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
--
To view, visit https://gem5-review.googlesource.com/6981
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I1412f303460d5c43dafdb9b3cd07af81c908a441
Gerrit-Change-Number: 6981
Gerrit-PatchSet: 4
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Alexandru Duțu <alexandru.d...@amd.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Brandon Potter <brandon.pot...@amd.com>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
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