Nikos Nikoleris has submitted this change and it was merged. (
https://gem5-review.googlesource.com/8289 )
Change subject: mem-cache: Remove unused return value from the
recvTimingReq func
......................................................................
mem-cache: Remove unused return value from the recvTimingReq func
The recvTimingReq function in the cache always returns true. This
changeset removes the return value.
Change-Id: I00dddca65ee7224ecfa579ea5195c841dac02972
Reviewed-on: https://gem5-review.googlesource.com/8289
Maintainer: Nikos Nikoleris <[email protected]>
Reviewed-by: Daniel Carvalho <[email protected]>
---
M src/mem/cache/cache.cc
M src/mem/cache/cache.hh
2 files changed, 7 insertions(+), 12 deletions(-)
Approvals:
Daniel Carvalho: Looks good to me, approved
Nikos Nikoleris: Looks good to me, approved
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index cbc0ed9..c03b5b2 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -648,7 +648,7 @@
}
}
-bool
+void
Cache::recvTimingReq(PacketPtr pkt)
{
DPRINTF(CacheTags, "%s tags:\n%s\n", __func__, tags->print());
@@ -660,7 +660,7 @@
// @todo This should really enqueue the packet rather
bool M5_VAR_USED success = memSidePort->sendTimingReq(pkt);
assert(success);
- return true;
+ return;
}
promoteWholeLineWrites(pkt);
@@ -730,7 +730,7 @@
// and we have already sent out any express snoops in the
// section above to ensure all other copies in the system are
// invalidated
- return true;
+ return;
}
// anything that is merely forwarded pays for the forward latency and
@@ -976,8 +976,6 @@
if (next_pf_time != MaxTick)
schedMemSideSendEvent(next_pf_time);
-
- return true;
}
PacketPtr
@@ -2770,13 +2768,11 @@
assert(!cache->system->bypassCaches());
// always let express snoop packets through if even if blocked
- if (pkt->isExpressSnoop()) {
- bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt);
- assert(bypass_success);
+ if (pkt->isExpressSnoop() || tryTiming(pkt)) {
+ cache->recvTimingReq(pkt);
return true;
}
-
- return tryTiming(pkt) && cache->recvTimingReq(pkt);
+ return false;
}
Tick
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index 4d840be..7d28279 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -350,9 +350,8 @@
/**
* Performs the access specified by the request.
* @param pkt The request to perform.
- * @return The result of the access.
*/
- bool recvTimingReq(PacketPtr pkt);
+ void recvTimingReq(PacketPtr pkt);
/**
* Insert writebacks into the write buffer
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I00dddca65ee7224ecfa579ea5195c841dac02972
Gerrit-Change-Number: 8289
Gerrit-PatchSet: 4
Gerrit-Owner: Nikos Nikoleris <[email protected]>
Gerrit-Reviewer: Daniel Carvalho <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: Nikos Nikoleris <[email protected]>
Gerrit-MessageType: merged
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