Hi Hesham, I just want to clarify, why I changed the panic to a warning: In this patch, interrupts aren't supported at all, so an empty clearAll() function is sufficient. But I wanted to keep the warning, to let users know, that there is something missing and not implemented.
Regards, Robert Am 17.05.2018 um 10:56 schrieb Hesham Almatary: > Hi Jason and Alec, > > Thanks for your replies. I pulled the baremetal patches and created a > simple system. It's able to run simple custom bootloader I have. Just > had to comment this line [1] as it kept being printed out. > > [1] > https://gem5-review.googlesource.com/c/public/gem5/+/9061/4/src/arch/riscv/interrupts.hh#82 > > Best, > Hesham > > On Wed, May 16, 2018 at 4:40 PM, Alec Roelke <ar...@virginia.edu> wrote: >> Hi Hesham, >> >> As Jason mentioned, there is some rudimentary support for FS simulation of >> RISC-V, but currently it doesn't support RISC-V's privilege modes. There >> are some additional patches that improve support, but those are also >> limited. They can be found at: >> >> - https://gem5-review.googlesource.com/c/public/gem5/+/9161, together >> with https://gem5-review.googlesource.com/c/public/gem5/+/9821/1: add >> some support for fault handling (note that these patches are a little >> out-of-date and may have some conflicts with the latest version of gem5) >> - https://gem5-review.googlesource.com/c/public/gem5/+/9822/1: add >> support for URET, SRET, and MRET instructions >> >> There is ongoing work on FS support, but, in my case, it is something that >> I currently have to do on my free time, so I can't give you a good estimate >> of when it will be completed. >> >> Regards, >> Alec >> >> On Tue, May 15, 2018 at 1:41 PM, Jason Lowe-Power <ja...@lowepower.com> >> wrote: >> >>> Hi Heshem, >>> >>> There's a patch on our gerrit review site that has some support for FS in >>> RISC-V https://gem5-review.googlesource.com/c/public/gem5/+/9061/4. It >>> would be great if you could test it to see if it works for your system and >>> review it on gerrit. >>> >>> Cheers, >>> Jason >>> >>> On Tue, May 15, 2018 at 2:41 AM Hesham Almatary <heshamelmat...@gmail.com> >>> wrote: >>> >>>> Hi, >>>> >>>> Just wondering what the status of RISC-V full system support is. I'm >>>> not particularly interested in running Linux, just need support for M, >>>> S, U modes and MMU. >>>> >>>> If it's not supported, is anyone working on it? If yes, I would >>>> appreciate any hints when it might get upstream. >>>> >>>> Cheers, >>>> -- >>>> Hesham >>>> _______________________________________________ >>>> gem5-dev mailing list >>>> gem5-dev@gem5.org >>>> http://m5sim.org/mailman/listinfo/gem5-dev >>> >>> >> _______________________________________________ >> gem5-dev mailing list >> gem5-dev@gem5.org >> http://m5sim.org/mailman/listinfo/gem5-dev > > > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
