Hanhwi Jang has submitted this change and it was merged. (
https://gem5-review.googlesource.com/7481 )
Change subject: cpu-o3: Missing freeing the heads of DepGraph in IQ
squashing
......................................................................
cpu-o3: Missing freeing the heads of DepGraph in IQ squashing
Free the squahsed instructions' heads of DepGraph in IQ squashing
In a system with large register file (ex.2048), the number of
DynInst hits the hardcoded limit (1500). This is caused by
missing freeing the heads of DepGraph in IQ. IQ only clears
out the heads when instructions reach writeback stage.
If a instruction is squashed before writeback stage, its head of
dependency graph, which holds the instruction's DynInstPtr,
would not be cleared out. This prevents freeing the DynInst of the
squahsed instruction even after it is committed.
Change-Id: I05b3db93cb6ad8960183d7ae765149c7f292e5b3
Reviewed-on: https://gem5-review.googlesource.com/7481
Reviewed-by: Jason Lowe-Power <ja...@lowepower.com>
Maintainer: Jason Lowe-Power <ja...@lowepower.com>
---
M src/cpu/o3/inst_queue_impl.hh
1 file changed, 19 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index f70f662..84ac579 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -1338,6 +1338,25 @@
++freeEntries;
}
+ // IQ clears out the heads of the dependency graph only when
+ // instructions reach writeback stage. If an instruction is
squashed
+ // before writeback stage, its head of dependency graph would not
be
+ // cleared out; it holds the instruction's DynInstPtr. This
prevents
+ // freeing the squashed instruction's DynInst.
+ // Thus, we need to manually clear out the squashed instructions'
heads
+ // of dependency graph.
+ for (int dest_reg_idx = 0;
+ dest_reg_idx < squashed_inst->numDestRegs();
+ dest_reg_idx++)
+ {
+ PhysRegIdPtr dest_reg =
+ squashed_inst->renamedDestRegIdx(dest_reg_idx);
+ if (dest_reg->isFixedMapping()){
+ continue;
+ }
+ assert(dependGraph.empty(dest_reg->flatIndex()));
+ dependGraph.clearInst(dest_reg->flatIndex());
+ }
instList[tid].erase(squash_it--);
++iqSquashedInstsExamined;
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I05b3db93cb6ad8960183d7ae765149c7f292e5b3
Gerrit-Change-Number: 7481
Gerrit-PatchSet: 5
Gerrit-Owner: Hanhwi Jang <jang.han...@gmail.com>
Gerrit-Assignee: Giacomo Gabrielli <giacomo.gabrie...@arm.com>
Gerrit-Reviewer: Hanhwi Jang <jang.han...@gmail.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Pau Cabre <pau.ca...@metempsy.com>
Gerrit-CC: Giacomo Gabrielli <giacomo.gabrie...@arm.com>
Gerrit-MessageType: merged
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