Jason Lowe-Power has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/11949
Change subject: misc: Appease GCC 8
......................................................................
misc: Appease GCC 8
GCC 8 adds a number of new warnings to -Wall which generate errors.
- Fix memset to 0 for structs. Instead of using memset, I added an
explicit default constructor which zeroed all members.
- Fix cast with const when the const was ignored.
- Fix catch a polymorphic type by value
We now compile with GCC 8!
Change-Id: Iab70ce11190eee67608fc25c0bedff170152b153
Signed-off-by: Jason Lowe-Power <ja...@lowepower.com>
---
M src/arch/x86/decoder.hh
M src/arch/x86/types.hh
M src/base/bitunion.hh
M src/cpu/testers/traffic_gen/pygen.cc
M src/dev/storage/ide_ctrl.cc
M src/dev/storage/ide_ctrl.hh
6 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 3630ea8..2b92ce7 100644
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -239,7 +239,6 @@
outOfBytes(true), instDone(false),
state(ResetState)
{
- memset(&emi, 0, sizeof(emi));
mode = LongMode;
submode = SixtyFourBitMode;
emi.mode.mode = mode;
diff --git a/src/arch/x86/types.hh b/src/arch/x86/types.hh
index 6e1b1cf..ca1aedc 100644
--- a/src/arch/x86/types.hh
+++ b/src/arch/x86/types.hh
@@ -199,14 +199,19 @@
//The intermediate structure used by the x86 decoder.
struct ExtMachInst
{
+ ExtMachInst() : legacy(0), rex(0), vex(0), modRM(0),
+ sib(0), immediate(0), displacement(0), opSize(0),
+ addrSize(0), stackSize(0), dispSize(0), mode(0)
+ { }
//Prefixes
LegacyPrefixVector legacy;
Rex rex;
VexInfo vex;
//This holds all of the bytes of the opcode
- struct
+ struct OpcodeStruct
{
+ OpcodeStruct() : type(0), op(0) { }
OpcodeType type;
//The main opcode byte. The highest addressed byte in the
opcode.
Opcode op;
diff --git a/src/base/bitunion.hh b/src/base/bitunion.hh
index 49a956e..1a32991 100644
--- a/src/base/bitunion.hh
+++ b/src/base/bitunion.hh
@@ -435,7 +435,7 @@
inline std::ostream &
bitfieldBackendPrinter(std::ostream &os, const char &t)
{
- os << (const int)t;
+ os << (int)t;
return os;
}
@@ -443,7 +443,7 @@
inline std::ostream &
bitfieldBackendPrinter(std::ostream &os, const unsigned char &t)
{
- os << (const unsigned int)t;
+ os << (unsigned int)t;
return os;
}
}
diff --git a/src/cpu/testers/traffic_gen/pygen.cc
b/src/cpu/testers/traffic_gen/pygen.cc
index ce1d591..9ce2fbf 100644
--- a/src/cpu/testers/traffic_gen/pygen.cc
+++ b/src/cpu/testers/traffic_gen/pygen.cc
@@ -74,7 +74,7 @@
metaGenerator->cast<std::shared_ptr<BaseGen>>();
metaGenerator++;
return gen;
- } catch (py::cast_error) {
+ } catch (py::cast_error&) {
fatal("Meta generator didn't return a valid trace generator\n");
}
}
diff --git a/src/dev/storage/ide_ctrl.cc b/src/dev/storage/ide_ctrl.cc
index d1c9f7d..d061a0c 100644
--- a/src/dev/storage/ide_ctrl.cc
+++ b/src/dev/storage/ide_ctrl.cc
@@ -83,7 +83,6 @@
cmdAddr(0), cmdSize(_cmdSize), ctrlAddr(0), ctrlSize(_ctrlSize),
master(NULL), slave(NULL), selected(NULL)
{
- memset(&bmiRegs, 0, sizeof(bmiRegs));
bmiRegs.status.dmaCap0 = 1;
bmiRegs.status.dmaCap1 = 1;
}
diff --git a/src/dev/storage/ide_ctrl.hh b/src/dev/storage/ide_ctrl.hh
index 94a9c65..c8c82e4 100644
--- a/src/dev/storage/ide_ctrl.hh
+++ b/src/dev/storage/ide_ctrl.hh
@@ -81,6 +81,9 @@
/** Registers used for bus master interface */
struct BMIRegs
{
+ BMIRegs() : command(0), reserved0(0), status(0),
+ reserved1(0), bmidtp(0)
+ { }
BMICommandReg command;
uint8_t reserved0;
BMIStatusReg status;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Iab70ce11190eee67608fc25c0bedff170152b153
Gerrit-Change-Number: 11949
Gerrit-PatchSet: 1
Gerrit-Owner: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-MessageType: newchange
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