Hey folks. I think I'm missing some context from when I was away from gem5. Does anyone know why there's a separate register file defined explicitly for condition code registers? Why is having them as integer registers not sufficient?
Also as a general point, it's bad form to have "generic" features like this which are hidden behind #ifdefs and #defines and only implemented for one or two ISAs. Another example of this is a feature in MIPS which it uses to read registers of other threads and which is only available in that ISA. If the primitives available for ISAs aren't sufficient lets fix that, not add on ISA specific extensions which are unused or incompatible with most of the ISAs and hidden behind flags. Gabe _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
