[gem5-dev] Change in gem5/gem5[master]: mem-cache: Remove writebacks parameter from serviceMSHRTargets

[Daniel Carvalho (Gerrit)]

Daniel Carvalho has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/14896

Change subject: mem-cache: Remove writebacks parameter from  
serviceMSHRTargets
......................................................................

mem-cache: Remove writebacks parameter from serviceMSHRTargets

Change 8ba77ae8fc98a355082da2bd9fdc6ecf4928f725 introduced the
writebacks parameter, but it was never used.

Change-Id: I225e5b399de42d77c72fc0012d3dc93ef39b8853
Signed-off-by: Daniel R. Carvalho <oda...@yahoo.com.br>
---
M src/mem/cache/base.cc
M src/mem/cache/base.hh
M src/mem/cache/cache.cc
M src/mem/cache/cache.hh
M src/mem/cache/noncoherent_cache.cc
M src/mem/cache/noncoherent_cache.hh
6 files changed, 8 insertions(+), 11 deletions(-)



diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index bad24f7..08cd09f 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -498,7 +498,7 @@
         mshr->promoteWritable();
     }

-    serviceMSHRTargets(mshr, pkt, blk, writebacks);
+    serviceMSHRTargets(mshr, pkt, blk);

     if (mshr->promoteDeferredTargets()) {
         // avoid later read getting stale data while write miss is
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 240bf21..70b3d3e 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -495,16 +495,14 @@
      * Service non-deferred MSHR targets using the received response
      *
      * Iterates through the list of targets that can be serviced with
-     * the current response. Any writebacks that need to performed
-     * must be appended to the writebacks parameter.
+     * the current response.
      *
      * @param mshr The MSHR that corresponds to the reponse
      * @param pkt The response packet
      * @param blk The reference block
-     * @param writebacks List of writebacks that need to be performed
      */
     virtual void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt,
-                                    CacheBlk *blk, PacketList& writebacks)  
= 0;
+                                    CacheBlk *blk) = 0;

     /**
      * Handles a response (cache line fill/write ack) from the bus.
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 624f244..90c4b9b 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -685,8 +685,7 @@


 void
-Cache::serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk,
-                          PacketList &writebacks)
+Cache::serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk)
 {
     MSHR::Target *initial_tgt = mshr->getTarget();
     // First offset for critical word first calculations
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index a7eb97d..33c5a24 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -103,8 +103,8 @@

     void doWritebacksAtomic(PacketList& writebacks) override;

-    void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk,
-                            PacketList& writebacks) override;
+    void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt,
+                            CacheBlk *blk) override;

     void recvTimingSnoopReq(PacketPtr pkt) override;

diff --git a/src/mem/cache/noncoherent_cache.cc  
b/src/mem/cache/noncoherent_cache.cc
index 5edd435..ca282a3 100644
--- a/src/mem/cache/noncoherent_cache.cc
+++ b/src/mem/cache/noncoherent_cache.cc
@@ -243,7 +243,7 @@

 void
 NoncoherentCache::serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt,
-                                     CacheBlk *blk, PacketList &writebacks)
+                                     CacheBlk *blk)
 {
     MSHR::Target *initial_tgt = mshr->getTarget();
     // First offset for critical word first calculations
diff --git a/src/mem/cache/noncoherent_cache.hh  
b/src/mem/cache/noncoherent_cache.hh
index 824c7cc..3da87d9 100644
--- a/src/mem/cache/noncoherent_cache.hh
+++ b/src/mem/cache/noncoherent_cache.hh
@@ -86,7 +86,7 @@
     void doWritebacksAtomic(PacketList& writebacks) override;

     void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt,
-                            CacheBlk *blk, PacketList& writebacks)  
override;
+                            CacheBlk *blk) override;

     void recvTimingResp(PacketPtr pkt) override;


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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I225e5b399de42d77c72fc0012d3dc93ef39b8853
Gerrit-Change-Number: 14896
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Carvalho <oda...@yahoo.com.br>
Gerrit-MessageType: newchange
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