Daniel Carvalho has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/14936
Change subject: mem-cache: Add access delay to block eviction
......................................................................
mem-cache: Add access delay to block eviction
Finding a replacement victim has an associated delay that includes
a tag lookup, choosing a replacement victim, and reading the data
array of the possible victims. Then the chosen evicted blocks are
forwarded to the writebuffer.
This change does not consider the time to select a replacement victim.
Change-Id: I1fb7c9de02fac81bfa1e37ad61996d9d4ad47e47
Signed-off-by: Daniel R. Carvalho <[email protected]>
---
M src/mem/cache/base.cc
M src/mem/cache/base.hh
M src/mem/cache/cache.cc
M src/mem/cache/noncoherent_cache.cc
4 files changed, 23 insertions(+), 9 deletions(-)
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index bb52325..bb2d8ba 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -531,9 +531,10 @@
}
}
- // if we used temp block, check to see if its valid and then clear it
out
+ // If we used temp block, check to see if its valid and then clear it
out.
+ // Its contents are assumed to be instantaneously transferred to the
wb pkt
if (blk == tempBlock && tempBlock->isValid()) {
- evictBlock(blk, writebacks);
+ evictBlock(blk, writebacks, Cycles(0));
}
const Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
@@ -1314,7 +1315,14 @@
unusedPrefetches++;
}
- evictBlock(blk, writebacks);
+ // Here the time to find the replacement victims is taken into
+ // account, assuming that all data blocks to be evicted are
read
+ // simultaneously (likely false for sector caches). We neglect
+ // the latency of the replacement policy. The headerDelay is
not
+ // used here because it is already included in the latency of
the
+ // original packet, which is used in the forward time of the wb
+ evictBlock(blk, writebacks,
+ calculateAccessLatency(blk, 0, lookupLatency));
}
}
@@ -1338,10 +1346,12 @@
}
void
-BaseCache::evictBlock(CacheBlk *blk, PacketList &writebacks)
+BaseCache::evictBlock(CacheBlk *blk, PacketList &writebacks, Cycles delay)
{
PacketPtr pkt = evictBlock(blk);
if (pkt) {
+ // The payload delay is accounted for in doWritebacks()'s forward
time
+ pkt->payloadDelay = delay;
writebacks.push_back(pkt);
}
}
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 7f13541..daed9a0 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -728,8 +728,9 @@
*
* @param blk Block to invalidate
* @param writebacks Return a list of packets with writebacks
+ * @param delay The payload delay.
*/
- void evictBlock(CacheBlk *blk, PacketList &writebacks);
+ void evictBlock(CacheBlk *blk, PacketList &writebacks, Cycles delay);
/**
* Invalidate a cache block.
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 624f244..928a4b9 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -177,7 +177,8 @@
// flush and invalidate any existing block
CacheBlk *old_blk(tags->findBlock(pkt->getAddr(),
pkt->isSecure()));
if (old_blk && old_blk->isValid()) {
- BaseCache::evictBlock(old_blk, writebacks);
+ BaseCache::evictBlock(old_blk, writebacks,
+ calculateAccessLatency(blk, pkt->headerDelay,
lookupLatency));
}
blk = nullptr;
@@ -218,15 +219,16 @@
// the Writeback does not reset the bit corresponding to
this
// address in the snoop filter below.
wbPkt->setBlockCached();
- allocateWriteBuffer(wbPkt, forward_time);
+ allocateWriteBuffer(wbPkt, forward_time +
wbPkt->payloadDelay);
}
} else {
// If the block is not cached above, send packet below. Both
// CleanEvict and Writeback with BLOCK_CACHED flag cleared will
// reset the bit corresponding to this address in the snoop
filter
// below.
- allocateWriteBuffer(wbPkt, forward_time);
+ allocateWriteBuffer(wbPkt, forward_time + wbPkt->payloadDelay);
}
+ wbPkt->payloadDelay = 0;
writebacks.pop_front();
}
}
diff --git a/src/mem/cache/noncoherent_cache.cc
b/src/mem/cache/noncoherent_cache.cc
index 5edd435..cdaa695 100644
--- a/src/mem/cache/noncoherent_cache.cc
+++ b/src/mem/cache/noncoherent_cache.cc
@@ -102,7 +102,8 @@
{
while (!writebacks.empty()) {
PacketPtr wb_pkt = writebacks.front();
- allocateWriteBuffer(wb_pkt, forward_time);
+ allocateWriteBuffer(wb_pkt, forward_time + wb_pkt->payloadDelay);
+ wb_pkt->payloadDelay = 0;
writebacks.pop_front();
}
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I1fb7c9de02fac81bfa1e37ad61996d9d4ad47e47
Gerrit-Change-Number: 14936
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Carvalho <[email protected]>
Gerrit-MessageType: newchange
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