Giacomo Travaglini has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/15616 )

Change subject: arch-arm: Added TLBI_ALL EL2 instruction
......................................................................

arch-arm: Added TLBI_ALL EL2 instruction

This patch is adding TLBI_ALLE2(IS) operations to the arm ISA.

Change-Id: I8e35cff9a2cc414f4c5fbbc5aa0cfe5023a3f011
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-by: Anouk Van Laer <anouk.vanl...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15616
Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
Maintainer: Andreas Sandberg <andreas.sandb...@arm.com>
---
M src/arch/arm/isa.cc
1 file changed, 11 insertions(+), 3 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
  Nikos Nikoleris: Looks good to me, approved



diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index d7d51b8..17c87ba 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -1338,9 +1338,17 @@
                 tlbiOp.broadcast(tc);
                 return;
             }
-          // @todo: uncomment this to enable Virtualization
-          // case MISCREG_TLBI_ALLE2IS:
-          // case MISCREG_TLBI_ALLE2:
+          // AArch64 TLB Invalidate All, EL2, Inner Shareable
+          case MISCREG_TLBI_ALLE2:
+          case MISCREG_TLBI_ALLE2IS:
+            {
+                assert64(tc);
+                scr = readMiscReg(MISCREG_SCR, tc);
+
+                TLBIALL tlbiOp(EL2, haveSecurity && !scr.ns);
+                tlbiOp(tc);
+                return;
+            }
           // AArch64 TLB Invalidate All, EL1
           case MISCREG_TLBI_ALLE1:
           case MISCREG_TLBI_VMALLE1:

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15616
To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings

Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I8e35cff9a2cc414f4c5fbbc5aa0cfe5023a3f011
Gerrit-Change-Number: 15616
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Anouk Van Laer <anouk.vanl...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-MessageType: merged
_______________________________________________
gem5-dev mailing list
gem5-dev@gem5.org
http://m5sim.org/mailman/listinfo/gem5-dev

Reply via email to