Hello, gem5 currently does not have support for hardware transactional memory. The CPU core models (e.g., the O3CPU), the ISAs (x86 or ARM), and the memory system (e.g., Ruby) would need to be enhanced to implement HTM.
Cheers, Jason On Fri, Apr 5, 2019 at 10:10 PM <zar...@neduet.edu.pk> wrote: > Hi > I am new to gem5. I have simulated a High Performance In-order ARM CPU > model in FS mode. I want Hardware Transactional Memory support with the > system so as to run STAMP benchmarks on it. Is some HTM model of a > processor available for that purpose. The processor may not necessarily be > ARM. I can go for x86 as well. > _______________________________________________ > gem5-dev mailing list > gem5-dev@gem5.org > http://m5sim.org/mailman/listinfo/gem5-dev _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
