Hello Andreas Sandberg, Giacomo Travaglini,
I'd like you to reexamine a change. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/19812
to look at the new patch set (#5).
Change subject: arch-arm: Added LD/ST<op> atomic instruction family and SWP
instrs
......................................................................
arch-arm: Added LD/ST<op> atomic instruction family and SWP instrs
Adding LD/ST/SWP family of instructions, LD/ST include a set of
operations like ADD/CLR/EOR/SET/UMAX/UMIN/SMAX/SMIN
This commit includes:
+ Instruction decode
+ Instruction functional code
+ New set of skeletons for Ex/Com/Ini/Constructor and declaration.
Change-Id: Ieea8d4256807e004d2f8aca8f421b3df8d76b116
---
M src/arch/arm/isa/formats/aarch64.isa
M src/arch/arm/isa/insts/amo64.isa
M src/arch/arm/isa/templates/mem64.isa
3 files changed, 1,039 insertions(+), 27 deletions(-)
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Ieea8d4256807e004d2f8aca8f421b3df8d76b116
Gerrit-Change-Number: 19812
Gerrit-PatchSet: 5
Gerrit-Owner: Jordi Vaquero <jordi.vaqu...@metempsy.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newpatchset
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