Pouya Fotouhi has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/19892 )
Change subject: arch-x86: Updating fault condition for write to cr4
......................................................................
arch-x86: Updating fault condition for write to cr4
A fault is generated if there is a bit set that's above bit 11.
However, there are lots of bits above 11 now.
In particular, our implementation of CPUID returns 0x04000209 for
RCX (family 0: Standard Functions, function 1: FamilyModelStepping)
which sets bit 26 (XSAVE) on RCX - which is bit 18 on cr4.
Change-Id: I17c1c341d85e51d532a0ddbd622b9139025a5276
---
M src/arch/x86/isa/microops/regop.isa
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/arch/x86/isa/microops/regop.isa
b/src/arch/x86/isa/microops/regop.isa
index 6f2901b..9dd9375 100644
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -1414,7 +1414,7 @@
{
CR4 cr4 = newVal;
// PAE can't be disabled in long mode.
- if (bits(newVal, 63, 11) ||
+ if (bits(newVal, 63, 22) ||
(machInst.mode.mode == LongMode
&& !cr4.pae))
fault = std::make_shared<GeneralProtection>(0);
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I17c1c341d85e51d532a0ddbd622b9139025a5276
Gerrit-Change-Number: 19892
Gerrit-PatchSet: 1
Gerrit-Owner: Pouya Fotouhi <pfoto...@ucdavis.edu>
Gerrit-MessageType: newchange
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