Hello Andreas Sandberg,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/20983
to review the following change.
Change subject: arch-arm: PSTATE.PAN changes should inval cached regs in TLB
......................................................................
arch-arm: PSTATE.PAN changes should inval cached regs in TLB
Change-Id: Id94e355fec345d2e952539a7dce7fbd21ed220c6
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
---
M src/arch/arm/isa.cc
1 file changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index b957105..6e65102 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -791,6 +791,10 @@
getDTBPtr(tc)->invalidateMiscReg();
}
+ if (cpsr.pan != old_cpsr.pan) {
+ getDTBPtr(tc)->invalidateMiscReg();
+ }
+
DPRINTF(Arm, "Updating CPSR from %#x to %#x f:%d i:%d a:%d
mode:%#x\n",
miscRegs[misc_reg], cpsr, cpsr.f, cpsr.i, cpsr.a,
cpsr.mode);
PCState pc = tc->pcState();
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Id94e355fec345d2e952539a7dce7fbd21ed220c6
Gerrit-Change-Number: 20983
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-MessageType: newchange
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