Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/25431 )
Change subject: arch-arm: Fix ArmKVM build
......................................................................
arch-arm: Fix ArmKVM build
BaseInterrupts don't have a checkRaw method.
This was breaking gem5 compilation on a Arm machine
Change-Id: I8717b1bcf64ed14e8a0f63a9dcaca6041dbea4d3
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25431
Reviewed-by: Jason Lowe-Power <ja...@lowepower.com>
Reviewed-by: Gabe Black <gabebl...@google.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/kvm/arm_cpu.cc
M src/arch/arm/kvm/base_cpu.cc
2 files changed, 8 insertions(+), 4 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Gabe Black: Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc
index 80576a2..24f7be8 100644
--- a/src/arch/arm/kvm/arm_cpu.cc
+++ b/src/arch/arm/kvm/arm_cpu.cc
@@ -45,6 +45,7 @@
#include <cerrno>
#include <memory>
+#include "arch/arm/interrupts.hh"
#include "arch/registers.hh"
#include "cpu/kvm/base.hh"
#include "debug/Kvm.hh"
@@ -270,8 +271,9 @@
Tick
ArmKvmCPU::kvmRun(Tick ticks)
{
- bool simFIQ(interrupts[0]->checkRaw(INT_FIQ));
- bool simIRQ(interrupts[0]->checkRaw(INT_IRQ));
+ auto interrupt = static_cast<ArmISA::Interrupts *>(interrupts[0]);
+ const bool simFIQ(interrupt->checkRaw(INT_FIQ));
+ const bool simIRQ(interrupt->checkRaw(INT_IRQ));
if (fiqAsserted != simFIQ) {
fiqAsserted = simFIQ;
diff --git a/src/arch/arm/kvm/base_cpu.cc b/src/arch/arm/kvm/base_cpu.cc
index 7659650..c99e853 100644
--- a/src/arch/arm/kvm/base_cpu.cc
+++ b/src/arch/arm/kvm/base_cpu.cc
@@ -41,6 +41,7 @@
#include <linux/kvm.h>
+#include "arch/arm/interrupts.hh"
#include "debug/KvmInt.hh"
#include "params/BaseArmKvmCPU.hh"
@@ -88,8 +89,9 @@
Tick
BaseArmKvmCPU::kvmRun(Tick ticks)
{
- const bool simFIQ(interrupts[0]->checkRaw(INT_FIQ));
- const bool simIRQ(interrupts[0]->checkRaw(INT_IRQ));
+ auto interrupt = static_cast<ArmISA::Interrupts *>(interrupts[0]);
+ const bool simFIQ(interrupt->checkRaw(INT_FIQ));
+ const bool simIRQ(interrupt->checkRaw(INT_IRQ));
if (!vm.hasKernelIRQChip()) {
if (fiqAsserted != simFIQ) {
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/25431
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Gerrit-Project: public/gem5
Gerrit-Branch: release-staging-v19.0.0.0
Gerrit-Change-Id: I8717b1bcf64ed14e8a0f63a9dcaca6041dbea4d3
Gerrit-Change-Number: 25431
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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