Tiago Mück has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/21928 )

Change subject: mem-ruby: Fixed MOESI_CMP_directory resource tracking
......................................................................

mem-ruby: Fixed MOESI_CMP_directory resource tracking

Fixes a few resource allocation issues in the directory controller:

- Added TBE resource checks on allocation.
- Now also allocating a TBE when issuing read requests to the controller
  to allow for a better response to backpressure. Without the TBE as a
  limiting factor, the directory can have an unbounded amount of
  outstanding memory requests.
- Also allocating a TBE for forwarded requests.

Change-Id: I17016668bd64a50a4354baad5d181e6d3802ac46
Signed-off-by: Tiago Mück <tiago.m...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21928
Maintainer: Jason Lowe-Power <power...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
Reviewed-by: Pouya Fotouhi <pfoto...@ucdavis.edu>
---
M src/mem/ruby/protocol/MOESI_CMP_directory-dir.sm
M src/mem/ruby/protocol/MOESI_CMP_directory-dma.sm
2 files changed, 31 insertions(+), 4 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Pouya Fotouhi: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/mem/ruby/protocol/MOESI_CMP_directory-dir.sm b/src/mem/ruby/protocol/MOESI_CMP_directory-dir.sm
index ff1f91b..3b09cbf 100644
--- a/src/mem/ruby/protocol/MOESI_CMP_directory-dir.sm
+++ b/src/mem/ruby/protocol/MOESI_CMP_directory-dir.sm
@@ -459,6 +459,9 @@

   action(d_sendDataMsg, "d", desc="Send data to requestor") {
     peek(memQueue_in, MemoryMsg) {
+      // Not using tbe here, but we must have allocated on a memory
+      // request
+      assert(is_valid(tbe));
       enqueue(responseNetwork_out, ResponseMsg, 1) {
         out_msg.addr := address;
         out_msg.Sender := machineID;
@@ -596,6 +599,7 @@

action(qf_queueMemoryFetchRequest, "qf", desc="Queue off-chip fetch request") {
     peek(requestQueue_in, RequestMsg) {
+      assert(is_valid(tbe));
       enqueue(memQueue_out, MemoryMsg, to_memory_controller_latency) {
         out_msg.addr := address;
         out_msg.Type := MemoryRequestType:MEMORY_READ;
@@ -713,6 +717,7 @@
   }

   action(v_allocateTBE, "v", desc="Allocate TBE entry") {
+    check_allocate(TBEs);
     peek (requestQueue_in, RequestMsg) {
       assert(is_valid(tbe) == false);
       TBEs.allocate(address);
@@ -738,12 +743,14 @@
   // TRANSITIONS
   transition(I, GETX, MM_M) {
     allocDirEntry;
+    v_allocateTBE;
     qf_queueMemoryFetchRequest;
     i_popIncomingRequestQueue;
   }

   transition(I, DMA_READ, XI_M) {
     allocDirEntry;
+    v_allocateTBE;
     qf_queueMemoryFetchRequest;
     i_popIncomingRequestQueue;
   }
@@ -772,6 +779,7 @@
   transition(XI_M, Memory_Data_DMA, I) {
     d_sendDataMsg;  // ack count may be zero
     deallocDirEntry;
+    w_deallocateTBE;
     q_popMemQueue;
   }

@@ -796,6 +804,7 @@
   }

   transition(S, GETX, MM_M) {
+    v_allocateTBE;
     qf_queueMemoryFetchRequest;
     g_sendInvalidations;
     i_popIncomingRequestQueue;
@@ -818,11 +827,19 @@

   transition(I, GETS, IS_M) {
     allocDirEntry;
+    v_allocateTBE;
     qf_queueMemoryFetchRequest;
     i_popIncomingRequestQueue;
   }

-  transition({S, SS}, {GETS, DMA_READ}, SS) {
+  transition(S, {GETS, DMA_READ}, SS) {
+    v_allocateTBE;
+    qf_queueMemoryFetchRequest;
+    n_incrementOutstanding;
+    i_popIncomingRequestQueue;
+  }
+
+  transition(SS, {GETS, DMA_READ}) {
     qf_queueMemoryFetchRequest;
     n_incrementOutstanding;
     i_popIncomingRequestQueue;
@@ -888,22 +905,26 @@
   }

   transition(M, GETS, MO) {
+    v_allocateTBE;
     f_forwardRequest;
     i_popIncomingRequestQueue;
   }

   transition(M, PUTX, MI) {
+    v_allocateTBE;
     a_sendWriteBackAck;
     i_popIncomingRequestQueue;
   }

   // happens if M->O transition happens on-chip
   transition(M, PUTO, MI) {
+    v_allocateTBE;
     a_sendWriteBackAck;
     i_popIncomingRequestQueue;
   }

   transition(M, PUTO_SHARERS, MIS) {
+    v_allocateTBE;
     a_sendWriteBackAck;
     i_popIncomingRequestQueue;
   }
@@ -924,12 +945,14 @@
   }

   transition({MM, MO}, Exclusive_Unblock, M) {
+    w_deallocateTBE;
     cc_clearSharers;
     e_ownerIsUnblocker;
     j_popIncomingUnblockQueue;
   }

   transition(MO, Unblock, O) {
+    w_deallocateTBE;
     m_addUnlockerToSharers;
     j_popIncomingUnblockQueue;
   }
@@ -943,11 +966,13 @@
   }

   transition(IS, Unblock, S) {
+    w_deallocateTBE;
     m_addUnlockerToSharers;
     j_popIncomingUnblockQueue;
   }

   transition(IS, Exclusive_Unblock, M) {
+    w_deallocateTBE;
     cc_clearSharers;
     e_ownerIsUnblocker;
     j_popIncomingUnblockQueue;
@@ -960,6 +985,7 @@
   }

   transition(SS, Last_Unblock, S) {
+    w_deallocateTBE;
     m_addUnlockerToSharers;
     o_decrementOutstanding;
     j_popIncomingUnblockQueue;
@@ -980,7 +1006,6 @@
   transition(MI, Dirty_Writeback, WBI) {
     c_clearOwner;
     cc_clearSharers;
-    v_allocateTBE;
     qw_queueMemoryWBFromCacheRequest;
     i_popIncomingRequestQueue;
   }
@@ -994,13 +1019,13 @@

   transition(MIS, Dirty_Writeback, WBS) {
     c_moveOwnerToSharer;
-    v_allocateTBE;
     qw_queueMemoryWBFromCacheRequest;
     i_popIncomingRequestQueue;
   }

   transition(MIS, Clean_Writeback, S) {
     c_moveOwnerToSharer;
+    w_deallocateTBE;
     i_popIncomingRequestQueue;
   }

@@ -1032,6 +1057,7 @@
   transition(MI, Clean_Writeback, I) {
     c_clearOwner;
     cc_clearSharers;
+    w_deallocateTBE;
     deallocDirEntry;
     i_popIncomingRequestQueue;
   }
@@ -1041,7 +1067,7 @@
     i_popIncomingRequestQueue;
   }

-  transition({S, O, M, SS, OO}, Memory_Data_Cache) {
+  transition({S, SS}, Memory_Data_Cache) {
     d_sendDataMsg;
     q_popMemQueue;
   }
diff --git a/src/mem/ruby/protocol/MOESI_CMP_directory-dma.sm b/src/mem/ruby/protocol/MOESI_CMP_directory-dma.sm
index 5a52b60..c2eb593 100644
--- a/src/mem/ruby/protocol/MOESI_CMP_directory-dma.sm
+++ b/src/mem/ruby/protocol/MOESI_CMP_directory-dma.sm
@@ -255,6 +255,7 @@
   }

   action(v_allocateTBE, "v", desc="Allocate TBE entry") {
+    check_allocate(TBEs);
     TBEs.allocate(address);
     set_tbe(TBEs[address]);
   }

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I17016668bd64a50a4354baad5d181e6d3802ac46
Gerrit-Change-Number: 21928
Gerrit-PatchSet: 5
Gerrit-Owner: Tiago Mück <tiago.m...@arm.com>
Gerrit-Reviewer: Bradford Beckmann <brad.beckm...@amd.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: Pouya Fotouhi <pfoto...@ucdavis.edu>
Gerrit-Reviewer: Tiago Mück <tiago.m...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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