Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/31175 )

Change subject: dev-arm: Relax size constraint on AMBA ID registers
......................................................................

dev-arm: Relax size constraint on AMBA ID registers

This patch is allowing non word sized accesses to the AMBA ID
registers.

Change-Id: I61a7163a3b4120e8dbcdbd6d9b83d33a7996f979
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31175
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
Maintainer: Andreas Sandberg <andreas.sandb...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/dev/arm/amba_device.cc
M src/dev/arm/kmi.cc
M src/dev/arm/pl011.cc
M src/dev/arm/pl111.cc
M src/dev/arm/rtc_pl031.cc
5 files changed, 6 insertions(+), 6 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/dev/arm/amba_device.cc b/src/dev/arm/amba_device.cc
index 2ab2743..76872b1 100644
--- a/src/dev/arm/amba_device.cc
+++ b/src/dev/arm/amba_device.cc
@@ -80,7 +80,7 @@
     DPRINTF(AMBA, "Returning %#x for offset %#x(%d)\n",
             (amba_id >> byte) & 0xFF,
             pkt->getAddr() - pio_addr, byte);
-    assert(pkt->getSize() == 4);
-    pkt->setLE<uint32_t>((amba_id >> byte) & 0xFF);
+
+    pkt->setUintX((amba_id >> byte) & 0xFF, LittleEndianByteOrder);
     return true;
 }
diff --git a/src/dev/arm/kmi.cc b/src/dev/arm/kmi.cc
index 9d991c3..246fedb 100644
--- a/src/dev/arm/kmi.cc
+++ b/src/dev/arm/kmi.cc
@@ -95,7 +95,7 @@
       default:
         if (readId(pkt, ambaId, pioAddr)) {
             // Hack for variable size accesses
-            data = pkt->getLE<uint32_t>();
+            data = pkt->getUintX(LittleEndianByteOrder);
             break;
         }

diff --git a/src/dev/arm/pl011.cc b/src/dev/arm/pl011.cc
index 11485b5..a60276d 100755
--- a/src/dev/arm/pl011.cc
+++ b/src/dev/arm/pl011.cc
@@ -137,7 +137,7 @@
       default:
         if (readId(pkt, AMBA_ID, pioAddr)) {
             // Hack for variable size accesses
-            data = pkt->getLE<uint32_t>();
+            data = pkt->getUintX(LittleEndianByteOrder);
             break;
         }

diff --git a/src/dev/arm/pl111.cc b/src/dev/arm/pl111.cc
index f2b8e50..27606e1 100644
--- a/src/dev/arm/pl111.cc
+++ b/src/dev/arm/pl111.cc
@@ -182,7 +182,7 @@
       default:
         if (readId(pkt, AMBA_ID, pioAddr)) {
             // Hack for variable size accesses
-            data = pkt->getLE<uint32_t>();
+            data = pkt->getUintX(LittleEndianByteOrder);
             break;
         } else if (daddr >= CrsrImage && daddr <= 0xBFC) {
             // CURSOR IMAGE
diff --git a/src/dev/arm/rtc_pl031.cc b/src/dev/arm/rtc_pl031.cc
index 713d3f7..b2b2322 100644
--- a/src/dev/arm/rtc_pl031.cc
+++ b/src/dev/arm/rtc_pl031.cc
@@ -90,7 +90,7 @@
       default:
         if (readId(pkt, ambaId, pioAddr)) {
             // Hack for variable sized access
-            data = pkt->getLE<uint32_t>();
+            data = pkt->getUintX(LittleEndianByteOrder);
             break;
         }
panic("Tried to read PL031 at offset %#x that doesn't exist\n", daddr);

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/31175
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I61a7163a3b4120e8dbcdbd6d9b83d33a7996f979
Gerrit-Change-Number: 31175
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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