Emily Brickey has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/33315 )

Change subject: cpu-o3: convert commit to new style stats
......................................................................

cpu-o3: convert commit to new style stats

Change-Id: I859fe753d1a2ec2da8a4209d1db122f1014af5d6
---
M src/cpu/o3/commit.hh
M src/cpu/o3/commit_impl.hh
M src/cpu/o3/cpu.cc
3 files changed, 116 insertions(+), 155 deletions(-)



diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 69d1c86..8a0105b 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -143,9 +143,6 @@
     /** Returns the name of the DefaultCommit. */
     std::string name() const;

-    /** Registers statistics. */
-    void regStats();
-
     /** Registers probes. */
     void regProbePoints();

@@ -473,47 +470,51 @@
     /** Updates commit stats based on this instruction. */
     void updateComInstStats(const DynInstPtr &inst);

- /** Stat for the total number of squashed instructions discarded by commit.
-     */
-    Stats::Scalar commitSquashedInsts;
- /** Stat for the total number of times commit has had to stall due to a non-
-     * speculative instruction reaching the head of the ROB.
-     */
-    Stats::Scalar commitNonSpecStalls;
- /** Stat for the total number of branch mispredicts that caused a squash. */
-    Stats::Scalar branchMispredicts;
-    /** Distribution of the number of committed instructions each cycle. */
-    Stats::Distribution numCommittedDist;
+    struct CommitStats : public Stats::Group {
+        CommitStats(O3CPU *cpu, DefaultCommit *commit);
+        /** Stat for the total number of squashed instructions discarded by
+        * commit.
+        */
+        Stats::Scalar commitSquashedInsts;
+        /** Stat for the total number of times commit has had to stall due
+        * to a non-speculative instruction reaching the head of the ROB.
+        */
+        Stats::Scalar commitNonSpecStalls;
+        /** Stat for the total number of branch mispredicts that caused a
+        * squash.
+        */
+        Stats::Scalar branchMispredicts;
+ /** Distribution of the number of committed instructions each cycle. */
+        Stats::Distribution numCommittedDist;

-    /** Total number of instructions committed. */
-    Stats::Vector instsCommitted;
-    /** Total number of ops (including micro ops) committed. */
-    Stats::Vector opsCommitted;
-    /** Total number of software prefetches committed. */
-    Stats::Vector statComSwp;
-    /** Stat for the total number of committed memory references. */
-    Stats::Vector statComRefs;
-    /** Stat for the total number of committed loads. */
-    Stats::Vector statComLoads;
-    /** Stat for the total number of committed atomics. */
-    Stats::Vector statComAmos;
-    /** Total number of committed memory barriers. */
-    Stats::Vector statComMembars;
-    /** Total number of committed branches. */
-    Stats::Vector statComBranches;
-    /** Total number of vector instructions */
-    Stats::Vector statComVector;
-    /** Total number of floating point instructions */
-    Stats::Vector statComFloating;
-    /** Total number of integer instructions */
-    Stats::Vector statComInteger;
-    /** Total number of function calls */
-    Stats::Vector statComFunctionCalls;
-    /** Committed instructions by instruction type (OpClass) */
-    Stats::Vector2d statCommittedInstType;
+        /** Total number of instructions committed. */
+        Stats::Vector instsCommitted;
+        /** Total number of ops (including micro ops) committed. */
+        Stats::Vector opsCommitted;
+        /** Stat for the total number of committed memory references. */
+        Stats::Vector comRefs;
+        /** Stat for the total number of committed loads. */
+        Stats::Vector comLoads;
+        /** Stat for the total number of committed atomics. */
+        Stats::Vector comAmos;
+        /** Total number of committed memory barriers. */
+        Stats::Vector comMembars;
+        /** Total number of committed branches. */
+        Stats::Vector comBranches;
+        /** Total number of vector instructions */
+        Stats::Vector comVector;
+        /** Total number of floating point instructions */
+        Stats::Vector comFloating;
+        /** Total number of integer instructions */
+        Stats::Vector comInteger;
+        /** Total number of function calls */
+        Stats::Vector comFunctionCalls;
+        /** Committed instructions by instruction type (OpClass) */
+        Stats::Vector2d committedInstType;

-    /** Number of cycles where the commit bandwidth limit is reached. */
-    Stats::Scalar commitEligibleSamples;
+ /** Number of cycles where the commit bandwidth limit is reached. */
+        Stats::Scalar commitEligibleSamples;
+    } stats;
 };

 #endif // __CPU_O3_COMMIT_HH__
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index c170484..57c4e50 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -92,10 +92,11 @@
       drainImminent(false),
       trapLatency(params->trapLatency),
       canHandleInterrupts(true),
-      avoidQuiesceLiveLock(false)
+      avoidQuiesceLiveLock(false),
+      stats(_cpu, this)
 {
     if (commitWidth > Impl::MaxWidth)
-        fatal("commitWidth (%d) is larger than compiled limit (%d),\n"
+    fatal("commitWidth (%d) is larger than compiled limit (%d),\n"
              "\tincrease MaxWidth in src/cpu/o3/impl.hh\n",
              commitWidth, static_cast<int>(Impl::MaxWidth));

@@ -143,129 +144,89 @@
 }

 template <class Impl>
-void
-DefaultCommit<Impl>::regStats()
+DefaultCommit<Impl>::CommitStats::CommitStats(O3CPU *cpu,
+    DefaultCommit *commit): Stats::Group(cpu, "commit"),
+    ADD_STAT(commitSquashedInsts, "The number of squashed insts skipped by"
+        "commit"),
+    ADD_STAT(commitNonSpecStalls, "The number of times commit has been"
+        "forced to stall to communicate backwards"),
+    ADD_STAT(branchMispredicts, "The number of times a branch was"
+        "mispredicted"),
+    ADD_STAT(numCommittedDist, "Number of insts commited each cycle"),
+    ADD_STAT(instsCommitted, "Number of instructions committed"),
+ ADD_STAT(opsCommitted, "Number of ops (including micro ops) committed"),
+    ADD_STAT(comRefs, "Number of memory references committed"),
+    ADD_STAT(comLoads, "Number of loads committed"),
+    ADD_STAT(comAmos, "Number of atomic instructions committed"),
+    ADD_STAT(comMembars, "Number of memory barriers committed"),
+    ADD_STAT(comBranches, "Number of branches committed"),
+    ADD_STAT(comVector, "Number of committed Vector instructions."),
+ ADD_STAT(comFloating, "Number of committed floating point instructions."),
+    ADD_STAT(comInteger, "Number of committed integer instructions."),
+    ADD_STAT(comFunctionCalls, "Number of function calls committed."),
+    ADD_STAT(committedInstType, "Class of committed instruction"),
+    ADD_STAT(commitEligibleSamples, "number cycles where commit BW limit"
+        "reached")
 {
     using namespace Stats;
-    commitSquashedInsts
-        .name(name() + ".commitSquashedInsts")
-        .desc("The number of squashed insts skipped by commit")
-        .prereq(commitSquashedInsts);

-    commitNonSpecStalls
-        .name(name() + ".commitNonSpecStalls")
-        .desc("The number of times commit has been forced to stall to "
-              "communicate backwards")
-        .prereq(commitNonSpecStalls);
-
-    branchMispredicts
-        .name(name() + ".branchMispredicts")
-        .desc("The number of times a branch was mispredicted")
-        .prereq(branchMispredicts);
+    commitSquashedInsts.prereq(commitSquashedInsts);
+    commitNonSpecStalls.prereq(commitNonSpecStalls);
+    branchMispredicts.prereq(branchMispredicts);

     numCommittedDist
-        .init(0,commitWidth,1)
-        .name(name() + ".committed_per_cycle")
-        .desc("Number of insts commited each cycle")
-        .flags(Stats::pdf)
-        ;
+        .init(0,commit->commitWidth,1)
+        .flags(Stats::pdf);

     instsCommitted
         .init(cpu->numThreads)
-        .name(name() + ".committedInsts")
-        .desc("Number of instructions committed")
-        .flags(total)
-        ;
+        .flags(total);

     opsCommitted
         .init(cpu->numThreads)
-        .name(name() + ".committedOps")
-        .desc("Number of ops (including micro ops) committed")
-        .flags(total)
-        ;
+        .flags(total);

-    statComSwp
+    comRefs
         .init(cpu->numThreads)
-        .name(name() + ".swp_count")
-        .desc("Number of s/w prefetches committed")
-        .flags(total)
-        ;
+        .flags(total);

-    statComRefs
+    comLoads
         .init(cpu->numThreads)
-        .name(name() +  ".refs")
-        .desc("Number of memory references committed")
-        .flags(total)
-        ;
+        .flags(total);

-    statComLoads
+    comAmos
         .init(cpu->numThreads)
-        .name(name() +  ".loads")
-        .desc("Number of loads committed")
-        .flags(total)
-        ;
+        .flags(total);

-    statComAmos
+    comMembars
         .init(cpu->numThreads)
-        .name(name() +  ".amos")
-        .desc("Number of atomic instructions committed")
-        .flags(total)
-        ;
+        .flags(total);

-    statComMembars
+    comBranches
         .init(cpu->numThreads)
-        .name(name() +  ".membars")
-        .desc("Number of memory barriers committed")
-        .flags(total)
-        ;
+        .flags(total);

-    statComBranches
+    comVector
         .init(cpu->numThreads)
-        .name(name() + ".branches")
-        .desc("Number of branches committed")
-        .flags(total)
-        ;
+        .flags(total);

-    statComFloating
+    comFloating
         .init(cpu->numThreads)
-        .name(name() + ".fp_insts")
-        .desc("Number of committed floating point instructions.")
-        .flags(total)
-        ;
+        .flags(total);

-    statComVector
+    comInteger
         .init(cpu->numThreads)
-        .name(name() + ".vec_insts")
-        .desc("Number of committed Vector instructions.")
-        .flags(total)
-        ;
+        .flags(total);

-    statComInteger
-        .init(cpu->numThreads)
-        .name(name()+".int_insts")
-        .desc("Number of committed integer instructions.")
-        .flags(total)
-        ;
+    comFunctionCalls
+        .init(commit->numThreads)
+        .flags(total);

-    statComFunctionCalls
-        .init(cpu->numThreads)
-        .name(name()+".function_calls")
-        .desc("Number of function calls committed.")
-        .flags(total)
-        ;
+    committedInstType
+        .init(commit->numThreads,Enums::Num_OpClass)
+        .flags(total | pdf | dist);

-    statCommittedInstType
-        .init(numThreads,Enums::Num_OpClass)
-        .name(name() + ".op_class")
-        .desc("Class of committed instruction")
-        .flags(total | pdf | dist)
-        ;
-    statCommittedInstType.ysubnames(Enums::OpClassStrings);
-
-    commitEligibleSamples
-        .name(name() + ".bw_lim_events")
-        .desc("number cycles where commit BW limit reached")
-        ;
+    committedInstType.ysubnames(Enums::OpClassStrings);
 }

 template <class Impl>
@@ -909,7 +870,7 @@
if (toIEW->commitInfo[tid].mispredictInst->isUncondCtrl()) {
                      toIEW->commitInfo[tid].branchTaken = true;
                 }
-                ++branchMispredicts;
+                ++stats.branchMispredicts;
             }

             toIEW->commitInfo[tid].pc = fromIEW->pc[tid];
@@ -1021,7 +982,7 @@

             rob->retireHead(commit_thread);

-            ++commitSquashedInsts;
+            ++stats.commitSquashedInsts;
             // Notify potential listeners that this instruction is squashed
             ppSquash->notify(head_inst);

@@ -1042,7 +1003,7 @@

             if (commit_success) {
                 ++num_committed;
-                statCommittedInstType[tid][head_inst->opClass()]++;
+                stats.committedInstType[tid][head_inst->opClass()]++;
                 ppCommit->notify(head_inst);

                 changedROBNumEntries[tid] = true;
@@ -1137,10 +1098,10 @@
     }

     DPRINTF(CommitRate, "%i\n", num_committed);
-    numCommittedDist.sample(num_committed);
+    stats.numCommittedDist.sample(num_committed);

     if (num_committed == commitWidth) {
-        commitEligibleSamples++;
+        stats.commitEligibleSamples++;
     }
 }

@@ -1193,7 +1154,7 @@
             toIEW->commitInfo[tid].strictlyOrdered = true;
             toIEW->commitInfo[tid].strictlyOrderedLoad = head_inst;
         } else {
-            ++commitNonSpecStalls;
+            ++stats.commitNonSpecStalls;
         }

         return false;
@@ -1389,8 +1350,8 @@
     ThreadID tid = inst->threadNumber;

     if (!inst->isMicroop() || inst->isLastMicroop())
-        instsCommitted[tid]++;
-    opsCommitted[tid]++;
+        stats.instsCommitted[tid]++;
+    stats.opsCommitted[tid]++;

     // To match the old model, don't count nops and instruction
     // prefetches towards the total commit count.
@@ -1402,41 +1363,41 @@
     //  Control Instructions
     //
     if (inst->isControl())
-        statComBranches[tid]++;
+        stats.comBranches[tid]++;

     //
     //  Memory references
     //
     if (inst->isMemRef()) {
-        statComRefs[tid]++;
+        stats.comRefs[tid]++;

         if (inst->isLoad()) {
-            statComLoads[tid]++;
+            stats.comLoads[tid]++;
         }

         if (inst->isAtomic()) {
-            statComAmos[tid]++;
+            stats.comAmos[tid]++;
         }
     }

     if (inst->isMemBarrier()) {
-        statComMembars[tid]++;
+        stats.comMembars[tid]++;
     }

     // Integer Instruction
     if (inst->isInteger())
-        statComInteger[tid]++;
+        stats.comInteger[tid]++;

     // Floating Point Instruction
     if (inst->isFloating())
-        statComFloating[tid]++;
+        stats.comFloating[tid]++;
     // Vector Instruction
     if (inst->isVector())
-        statComVector[tid]++;
+        stats.comVector[tid]++;

     // Function Calls
     if (inst->isCall())
-        statComFunctionCalls[tid]++;
+        stats.comFunctionCalls[tid]++;

 }

diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index d911490..a590d1e 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -445,7 +445,6 @@
     this->decode.regStats();
     this->rename.regStats();
     this->iew.regStats();
-    this->commit.regStats();
     this->rob.regStats();

     intRegfileReads

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33315
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I859fe753d1a2ec2da8a4209d1db122f1014af5d6
Gerrit-Change-Number: 33315
Gerrit-PatchSet: 1
Gerrit-Owner: Emily Brickey <esbric...@ucdavis.edu>
Gerrit-MessageType: newchange
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