Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30321 )
Change subject: cpu: Add HTM Instruction Flags
......................................................................
cpu: Add HTM Instruction Flags
IsHtmStart: Starts a HTM transaction
IsHtmStop: Stops (commits) a HTM transaction
IsHtmCancel: Explicitely aborts a HTM transaction
JIRA: https://gem5.atlassian.net/browse/GEM5-587
Change-Id: I33144f97a2009e28b0c64777f0313cd6eadb7ff9
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30321
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
Maintainer: Jason Lowe-Power <power...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/cpu/StaticInstFlags.py
M src/cpu/static_inst.hh
2 files changed, 19 insertions(+), 2 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/StaticInstFlags.py b/src/cpu/StaticInstFlags.py
index f756ba1..1c2b63a 100644
--- a/src/cpu/StaticInstFlags.py
+++ b/src/cpu/StaticInstFlags.py
@@ -1,3 +1,4 @@
+# Copyright (c) 2020 ARM Limited
# Copyright (c) 2003-2005 The Regents of The University of Michigan
# Copyright (c) 2013 Advanced Micro Devices, Inc.
# All rights reserved.
@@ -109,5 +110,9 @@
'IsMicroBranch', # This microop branches within the microcode
for
# a macroop
'IsDspOp',
- 'IsSquashAfter' # Squash all uncommitted state after executed
+ 'IsSquashAfter', # Squash all uncommitted state after executed
+ # hardware transactional memory
+ 'IsHtmStart', # Starts a HTM transaction
+ 'IsHtmStop', # Stops (commits) a HTM transaction
+ 'IsHtmCancel' # Explicitely aborts a HTM transaction
]
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index b523ef9..146be8c 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017 ARM Limited
+ * Copyright (c) 2017, 2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -202,6 +202,18 @@
bool isFirstMicroop() const { return flags[IsFirstMicroop]; }
//This flag doesn't do anything yet
bool isMicroBranch() const { return flags[IsMicroBranch]; }
+ // hardware transactional memory
+ // HtmCmds must be identified as such in order
+ // to provide them with necessary memory ordering semantics.
+ bool isHtmStart() const { return flags[IsHtmStart]; }
+ bool isHtmStop() const { return flags[IsHtmStop]; }
+ bool isHtmCancel() const { return flags[IsHtmCancel]; }
+
+ bool
+ isHtmCmd() const
+ {
+ return isHtmStart() || isHtmStop() || isHtmCancel();
+ }
//@}
void setFirstMicroop() { flags[IsFirstMicroop] = true; }
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I33144f97a2009e28b0c64777f0313cd6eadb7ff9
Gerrit-Change-Number: 30321
Gerrit-PatchSet: 9
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Alexandru Duțu <alexandru.d...@amd.com>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Timothy Hayes <timothy.ha...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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