Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33735 )

Change subject: mips,cpu: Eliminate the unused IsIndexed StaticInst flag.
......................................................................

mips,cpu: Eliminate the unused IsIndexed StaticInst flag.

It's set by some MIPS instructions, but does not have an accessor in
StaticInst and is not used by anything.

Change-Id: I3466f7d2723fb1b0ac195064867e3840e3a8f21b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33735
Reviewed-by: Bobby R. Bruce <bbr...@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
Maintainer: Gabe Black <gabebl...@google.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/mips/isa/formats/mem.isa
M src/cpu/StaticInstFlags.py
2 files changed, 2 insertions(+), 6 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve
  Bobby R. Bruce: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa
index 491dd0c..c5fd6f8 100644
--- a/src/arch/mips/isa/formats/mem.isa
+++ b/src/arch/mips/isa/formats/mem.isa
@@ -458,7 +458,6 @@

 def format LoadIndexedMemory(memacc_code, ea_code = {{ EA = Rs + Rt; }},
                      mem_flags = [], inst_flags = []) {{
-    inst_flags += ['IsIndexed']
     (header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
                       decode_template = ImmNopCheckDecode,
@@ -467,7 +466,6 @@

 def format StoreIndexedMemory(memacc_code, ea_code = {{ EA = Rs + Rt; }},
                      mem_flags = [], inst_flags = []) {{
-    inst_flags += ['IsIndexed']
     (header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
                       exec_template_base = 'Store')
@@ -475,7 +473,7 @@

 def format LoadFPIndexedMemory(memacc_code, ea_code = {{ EA = Rs + Rt; }},
                      mem_flags = [], inst_flags = []) {{
-    inst_flags += ['IsIndexed', 'IsFloating']
+    inst_flags += ['IsFloating']
     (header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
                       decode_template = ImmNopCheckDecode,
@@ -484,7 +482,7 @@

 def format StoreFPIndexedMemory(memacc_code, ea_code = {{ EA = Rs + Rt; }},
                      mem_flags = [], inst_flags = []) {{
-    inst_flags += ['IsIndexed', 'IsFloating']
+    inst_flags += ['IsFloating']
     (header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
                       exec_template_base = 'Store')
diff --git a/src/cpu/StaticInstFlags.py b/src/cpu/StaticInstFlags.py
index 8db5443..cbdfec3 100644
--- a/src/cpu/StaticInstFlags.py
+++ b/src/cpu/StaticInstFlags.py
@@ -64,8 +64,6 @@
         'IsStore',          # Writes to memory.
         'IsAtomic',         # Does atomic RMW to memory.
         'IsStoreConditional',   # Store conditional instruction.
-        'IsIndexed',        # Accesses memory with an indexed address
-                            # computation
         'IsInstPrefetch',   # Instruction-cache prefetch.
         'IsDataPrefetch',   # Data-cache prefetch.


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I3466f7d2723fb1b0ac195064867e3840e3a8f21b
Gerrit-Change-Number: 33735
Gerrit-PatchSet: 6
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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