[gem5-dev] Change in gem5/gem5[develop]: cpu, fastmodel: Remove the old getDTBPtr/getITBPtr virtual methods

Tue, 03 Nov 2020 01:55:32 -0800

Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34984 )
Change subject: cpu, fastmodel: Remove the old getDTBPtr/getITBPtr virtual methods 
......................................................................

cpu, fastmodel: Remove the old getDTBPtr/getITBPtr virtual methods

JIRA: https://gem5.atlassian.net/browse/GEM5-790

Change-Id: I6c6cdeaa3ae1433624e4e5b30b031d49e822f0e0
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34984
Maintainer: Gabe Black <[email protected]>
Tested-by: kokoro <[email protected]>
Reviewed-by: Anthony Gutierrez <[email protected]>
---
M src/arch/arm/fastmodel/iris/thread_context.hh
M src/cpu/checker/cpu.hh
M src/cpu/checker/thread_context.hh
M src/cpu/o3/thread_context.hh
M src/cpu/simple_thread.hh
M src/cpu/thread_context.hh
6 files changed, 0 insertions(+), 31 deletions(-)

Approvals:
  Anthony Gutierrez: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass
diff --git a/src/arch/arm/fastmodel/iris/thread_context.hh b/src/arch/arm/fastmodel/iris/thread_context.hh 
index 5e5d783..b7ea0b5 100644
--- a/src/arch/arm/fastmodel/iris/thread_context.hh
+++ b/src/arch/arm/fastmodel/iris/thread_context.hh
@@ -191,16 +191,6 @@
     int contextId() const override { return _contextId; }
     void setContextId(int id) override { _contextId = id; }

-    BaseTLB *
-    getITBPtr() override
-    {
-        return _itb;
-    }
-    BaseTLB *
-    getDTBPtr() override
-    {
-        return _dtb;
-    }
     BaseMMU *
     getMMUPtr() override
     {
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 5213026..7eabe57 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -152,9 +152,6 @@
     // Primary thread being run.
     SimpleThread *thread;

-    BaseTLB* getITBPtr() { return mmu->itb; }
-    BaseTLB* getDTBPtr() { return mmu->dtb; }
-
     BaseMMU* getMMUPtr() { return mmu; }

     virtual Counter totalInsts() const override
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh 
index 5a68be4..b9442e8 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -127,10 +127,6 @@
         actualTC->setThreadId(id);
     }

-    BaseTLB *getITBPtr() override { return actualTC->getITBPtr(); }
-
-    BaseTLB *getDTBPtr() override { return actualTC->getDTBPtr(); }
-
     BaseMMU *getMMUPtr() override { return actualTC->getMMUPtr(); }

     CheckerCPU *
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index d4353d1..11de927 100644
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -98,12 +98,6 @@
     /** Pointer to the thread state that this TC corrseponds to. */
     O3ThreadState<Impl> *thread;

-    /** Returns a pointer to the ITB. */
-    BaseTLB *getITBPtr() override { return cpu->mmu->itb; }
-
-    /** Returns a pointer to the DTB. */
-    BaseTLB *getDTBPtr() override { return cpu->mmu->dtb; }
-
     /** Returns a pointer to the MMU. */
     BaseMMU *getMMUPtr() override { return cpu->mmu; }

diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index e2f8070..b17f29a 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -206,10 +206,6 @@
ContextID contextId() const override { return ThreadState::contextId(); } void setContextId(ContextID id) override { ThreadState::setContextId(id); } 

-    BaseTLB *getITBPtr() override { return mmu->itb; }
-
-    BaseTLB *getDTBPtr() override { return mmu->dtb; }
-
     BaseMMU *getMMUPtr() override { return mmu; }

     CheckerCPU *getCheckerCpuPtr() override { return NULL; }
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 9bd5cf5..c50eb26 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -130,10 +130,6 @@

     virtual void setContextId(ContextID id) = 0;

-    virtual BaseTLB *getITBPtr() = 0;
-
-    virtual BaseTLB *getDTBPtr() = 0;
-
     virtual BaseMMU *getMMUPtr() = 0;

     virtual CheckerCPU *getCheckerCpuPtr() = 0;

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/34984
To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings 

Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I6c6cdeaa3ae1433624e4e5b30b031d49e822f0e0
Gerrit-Change-Number: 34984
Gerrit-PatchSet: 17
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Alexandru Duțu <[email protected]>
Gerrit-Reviewer: Anthony Gutierrez <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: Matthew Poremba <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-CC: Matt Sinclair <[email protected]>
Gerrit-MessageType: merged

_______________________________________________
gem5-dev mailing list -- [email protected]
To unsubscribe send an email to [email protected]
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

Reply via email to