[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix cache hits being profiled as cache misses

[Hoa Nguyen (Gerrit) via gem5-dev]

Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/37835 )

Change subject: mem-ruby: Fix cache hits being profiled as cache misses
......................................................................

mem-ruby: Fix cache hits being profiled as cache misses

There are some instances where a cache hit is profiled as a cache
miss. This commit addresses this error.

Change-Id: I7dafa806ef3f1e3717650dc25f8657a0ea741dd1
Signed-off-by: Hoa Nguyen <hoangu...@ucdavis.edu>
---
M src/mem/ruby/protocol/MI_example-cache.sm
M src/mem/ruby/protocol/MOESI_AMD_Base-CorePair.sm
M src/mem/ruby/protocol/MOESI_hammer-cache.sm
3 files changed, 6 insertions(+), 6 deletions(-)



diff --git a/src/mem/ruby/protocol/MI_example-cache.sm  
b/src/mem/ruby/protocol/MI_example-cache.sm
index 8738f33..2c9bdb7 100644
--- a/src/mem/ruby/protocol/MI_example-cache.sm
+++ b/src/mem/ruby/protocol/MI_example-cache.sm
@@ -353,7 +353,7 @@
       ++cacheMemory.demand_misses;
   }

-  action(p_profileHit, "ph", desc="Profile cache miss") {
+  action(p_profileHit, "ph", desc="Profile cache hit") {
       ++cacheMemory.demand_hits;
   }

diff --git a/src/mem/ruby/protocol/MOESI_AMD_Base-CorePair.sm  
b/src/mem/ruby/protocol/MOESI_AMD_Base-CorePair.sm
index a9589d6..fb957f0 100644
--- a/src/mem/ruby/protocol/MOESI_AMD_Base-CorePair.sm
+++ b/src/mem/ruby/protocol/MOESI_AMD_Base-CorePair.sm
@@ -1283,19 +1283,19 @@
   }

   action(l10h_profileHit, "l10h", desc="l10h hit profile") {
-    ++L1D0cache.demand_misses;
+    ++L1D0cache.demand_hits;
   }

   action(l11h_profileHit, "l11h", desc="l11h hit profile") {
-    ++L1D1cache.demand_misses;
+    ++L1D1cache.demand_hits;
   }

   action(l1ih_profileHit, "l1lh", desc="l1ih hit profile") {
-    ++L1Icache.demand_misses;
+    ++L1Icache.demand_hits;
   }

   action(l2h_profileHit, "l2h", desc="l2h hit profile") {
-    ++L2cache.demand_misses;
+    ++L2cache.demand_hits;
   }

   action(yy_recycleProbeQueue, "yy", desc="recycle probe queue") {
diff --git a/src/mem/ruby/protocol/MOESI_hammer-cache.sm  
b/src/mem/ruby/protocol/MOESI_hammer-cache.sm
index 8541f35..cbcf0e5 100644
--- a/src/mem/ruby/protocol/MOESI_hammer-cache.sm
+++ b/src/mem/ruby/protocol/MOESI_hammer-cache.sm
@@ -1285,7 +1285,7 @@
       ++L2cache.demand_misses;
   }

-  action(uu_profileL2Hit, "\uh", desc="Profile the demand hits ") {
+  action(uu_profileL2Hit, "\uh", desc="Profile the demand hits") {
       ++L2cache.demand_hits;
   }


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7dafa806ef3f1e3717650dc25f8657a0ea741dd1
Gerrit-Change-Number: 37835
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen <hoangu...@ucdavis.edu>
Gerrit-MessageType: newchange
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