[gem5-dev] Change in gem5/gem5[develop]: arch-power: Fix compare instructions

[Sandipan Das (Gerrit) via gem5-dev]

Sandipan Das has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40913 )

Change subject: arch-power: Fix compare instructions
......................................................................

arch-power: Fix compare instructions

Now that 64-bit registers are being used, instead of always
performing a 32-bit comparison, these instructions must use
the L field to determine the type of comparison to be made.
The comparison can either be 32-bit or 64-bit. This fixes
the following instructions.
  * Compare (cmp)
  * Compare Logical (cmpl)
  * Compare Immediate (cmpi)
  * Compare Logical Immediate (cmpli)

Change-Id: Ia7655ffa463214c24e094e01d4188decf6486904
Signed-off-by: Sandipan Das <sandi...@linux.ibm.com>
---
M src/arch/power/isa/decoder.isa
1 file changed, 22 insertions(+), 6 deletions(-)



diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index d623506..63d3afc 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -236,14 +236,22 @@

     format IntImmCompOp {
         11: cmpi({{
-            cr = makeCRField(Ra_sw, (int32_t)simm, xer.so);
-            }});
+            if (length) {
+                cr = makeCRField(Ra_sd, simm, xer.so);
+            } else {
+                cr = makeCRField((int32_t)Ra_sd, simm, xer.so);
+            }
+        }});
     }

     format IntImmCompLogicOp {
         10: cmpli({{
-            cr = makeCRField(Ra, (uint32_t)uimm, xer.so);
-            }});
+            if (length) {
+                cr = makeCRField(Ra, uimm, xer.so);
+            } else {
+                cr = makeCRField((uint32_t)Ra, uimm, xer.so);
+            }
+        }});
      }

     format IntImmLogicOp {
@@ -436,11 +444,19 @@

         format IntCompOp {
             0: cmp({{
-                cr = makeCRField(Ra_sw, Rb_sw, xer.so);
+                if (length) {
+                    cr = makeCRField(Ra_sd, Rb_sd, xer.so);
+                } else {
+                    cr = makeCRField((int32_t)Ra_sd, (int32_t)Rb_sd,  
xer.so);
+                }
             }});

             32: cmpl({{
-                cr = makeCRField(Ra, Rb, xer.so);
+                if (length) {
+                    cr = makeCRField(Ra, Rb, xer.so);
+                } else {
+                    cr = makeCRField((uint32_t)Ra, (uint32_t)Rb, xer.so);
+                }
             }});
         }


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia7655ffa463214c24e094e01d4188decf6486904
Gerrit-Change-Number: 40913
Gerrit-PatchSet: 1
Gerrit-Owner: Sandipan Das <sandi...@linux.ibm.com>
Gerrit-MessageType: newchange
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