Sandipan Das has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/40914 )
Change subject: arch-power: Fix disassembly for compare instructions
......................................................................
arch-power: Fix disassembly for compare instructions
This fixes disassembly generated for integer compare
instructions based on the type of operands, the type of
comparison to be made and the special use cases for which
the Power ISA provides extended mnemonics.
Change-Id: Ia052bef9589cc3ed290400390028398be28c8eff
Signed-off-by: Sandipan Das <sandi...@linux.ibm.com>
---
M src/arch/power/insts/integer.cc
M src/arch/power/insts/integer.hh
2 files changed, 188 insertions(+), 1 deletion(-)
diff --git a/src/arch/power/insts/integer.cc
b/src/arch/power/insts/integer.cc
index da7f392..4a03f8f 100644
--- a/src/arch/power/insts/integer.cc
+++ b/src/arch/power/insts/integer.cc
@@ -49,7 +49,6 @@
!myMnemonic.compare("mtxer") ||
!myMnemonic.compare("mtlr") ||
!myMnemonic.compare("mtctr") ||
- !myMnemonic.compare("cmpi") ||
!myMnemonic.compare("mttar")) {
printDest = false;
} else if (!myMnemonic.compare("mfcr") ||
@@ -287,6 +286,185 @@
std::string
+IntCompOp::generateDisassembly(
+ Addr pc, const Loader::SymbolTable *symtab) const
+{
+ std::stringstream ss;
+ bool printFieldPrefix = false;
+ bool printLength = true;
+
+ // Generate the correct mnemonic
+ std::string myMnemonic(mnemonic);
+
+ // Special cases
+ if (!myMnemonic.compare("cmp")) {
+ if (length) {
+ myMnemonic = "cmpd";
+ } else {
+ myMnemonic = "cmpw";
+ }
+ printFieldPrefix = true;
+ printLength = false;
+ } else if (!myMnemonic.compare("cmpl")) {
+ if (length) {
+ myMnemonic = "cmpld";
+ } else {
+ myMnemonic = "cmplw";
+ }
+ printFieldPrefix = true;
+ printLength = false;
+ }
+
+ ccprintf(ss, "%-10s ", myMnemonic);
+
+ // Print the first destination only
+ if (printFieldPrefix) {
+ if (field > 0) {
+ ss << "cr" << field;
+ }
+ } else {
+ ss << field;
+ }
+
+ // Print the length
+ if (printLength) {
+ if (!printFieldPrefix || field > 0) {
+ ss << ", ";
+ }
+ ss << length;
+ }
+
+ // Print the first source register
+ if (_numSrcRegs > 0) {
+ if (!printFieldPrefix || field > 0 || printLength) {
+ ss << ", ";
+ }
+ printReg(ss, srcRegIdx(0));
+
+ // Print the second source register
+ if (_numSrcRegs > 1) {
+ ss << ", ";
+ printReg(ss, srcRegIdx(1));
+ }
+ }
+
+ return ss.str();
+}
+
+
+std::string
+IntImmCompOp::generateDisassembly(
+ Addr pc, const Loader::SymbolTable *symtab) const
+{
+ std::stringstream ss;
+ bool printFieldPrefix = false;
+ bool printLength = true;
+
+ // Generate the correct mnemonic
+ std::string myMnemonic(mnemonic);
+
+ // Special cases
+ if (!myMnemonic.compare("cmpi")) {
+ if (length) {
+ myMnemonic = "cmpdi";
+ } else {
+ myMnemonic = "cmpwi";
+ }
+ printFieldPrefix = true;
+ printLength = false;
+ }
+
+ ccprintf(ss, "%-10s ", myMnemonic);
+
+ // Print the first destination only
+ if (printFieldPrefix) {
+ if (field > 0) {
+ ss << "cr" << field;
+ }
+ } else {
+ ss << field;
+ }
+
+ // Print the length
+ if (printLength) {
+ if (!printFieldPrefix || field > 0) {
+ ss << ", ";
+ }
+ ss << length;
+ }
+
+ // Print the first source register
+ if (_numSrcRegs > 0) {
+ if (!printFieldPrefix || field > 0 || printLength) {
+ ss << ", ";
+ }
+ printReg(ss, srcRegIdx(0));
+ }
+
+ // Print the immediate value
+ ss << ", " << simm;
+
+ return ss.str();
+}
+
+
+std::string
+IntImmCompLogicOp::generateDisassembly(
+ Addr pc, const Loader::SymbolTable *symtab) const
+{
+ std::stringstream ss;
+ bool printFieldPrefix = false;
+ bool printLength = true;
+
+ // Generate the correct mnemonic
+ std::string myMnemonic(mnemonic);
+
+ // Special cases
+ if (!myMnemonic.compare("cmpli")) {
+ if (length) {
+ myMnemonic = "cmpldi";
+ } else {
+ myMnemonic = "cmplwi";
+ }
+ printFieldPrefix = true;
+ printLength = false;
+ }
+
+ ccprintf(ss, "%-10s ", myMnemonic);
+
+ // Print the first destination only
+ if (printFieldPrefix) {
+ if (field > 0) {
+ ss << "cr" << field;
+ }
+ } else {
+ ss << field;
+ }
+
+ // Print the mode
+ if (printLength) {
+ if (!printFieldPrefix || field > 0) {
+ ss << ", ";
+ }
+ ss << length;
+ }
+
+ // Print the first source register
+ if (_numSrcRegs > 0) {
+ if (!printFieldPrefix || field > 0 || printLength) {
+ ss << ", ";
+ }
+ printReg(ss, srcRegIdx(0));
+ }
+
+ // Print the immediate value
+ ss << ", " << uimm;
+
+ return ss.str();
+}
+
+
+std::string
IntShiftOp::generateDisassembly(
Addr pc, const Loader::SymbolTable *symtab) const
{
diff --git a/src/arch/power/insts/integer.hh
b/src/arch/power/insts/integer.hh
index 75d4543..2cf35ab 100644
--- a/src/arch/power/insts/integer.hh
+++ b/src/arch/power/insts/integer.hh
@@ -443,6 +443,9 @@
field(machInst.bf)
{
}
+
+ std::string generateDisassembly(
+ Addr pc, const Loader::SymbolTable *symtab) const override;
};
@@ -461,6 +464,9 @@
simm((int16_t)machInst.si)
{
}
+
+ std::string generateDisassembly(
+ Addr pc, const Loader::SymbolTable *symtab) const override;
};
@@ -479,6 +485,9 @@
uimm(machInst.ui)
{
}
+
+ std::string generateDisassembly(
+ Addr pc, const Loader::SymbolTable *symtab) const override;
};
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia052bef9589cc3ed290400390028398be28c8eff
Gerrit-Change-Number: 40914
Gerrit-PatchSet: 1
Gerrit-Owner: Sandipan Das <sandi...@linux.ibm.com>
Gerrit-MessageType: newchange
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