Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/41013 )
Change subject: cpu,mem: Converting stats to supported units
......................................................................
cpu,mem: Converting stats to supported units
There are several stats having unit being a multiple of supported
units. This change makes the following conversions:
* MiB/s -> bytes/s
* percentage -> ratio
Change-Id: I9832796e87698daa7f87f91fa39ce40bbf92e737
Signed-off-by: Hoa Nguyen <hoangu...@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41013
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Daniel Carvalho <oda...@yahoo.com.br>
Reviewed-by: Bobby R. Bruce <bbr...@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbr...@ucdavis.edu>
---
M src/cpu/o3/fetch_impl.hh
M src/cpu/pred/bpred_unit.cc
M src/cpu/pred/bpred_unit.hh
M src/mem/mem_ctrl.cc
M src/mem/xbar.cc
5 files changed, 14 insertions(+), 15 deletions(-)
Approvals:
Daniel Carvalho: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 23ab06b..24e7464 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -193,8 +193,8 @@
"Number of outstanding ITLB misses that were squashed"),
ADD_STAT(nisnDist,
"Number of instructions fetched each cycle (Total)"),
- ADD_STAT(idleRate, "Percent of cycles fetch was idle",
- idleCycles * 100 / cpu->baseStats.numCycles),
+ ADD_STAT(idleRate, "Ratio of cycles fetch was idle",
+ idleCycles / cpu->baseStats.numCycles),
ADD_STAT(branchRate, "Number of branch fetches per cycle",
branches / cpu->baseStats.numCycles),
ADD_STAT(rate, "Number of inst fetches per cycle",
diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc
index e618fb5..d32d75b 100644
--- a/src/cpu/pred/bpred_unit.cc
+++ b/src/cpu/pred/bpred_unit.cc
@@ -74,8 +74,7 @@
ADD_STAT(condIncorrect, "Number of conditional branches incorrect"),
ADD_STAT(BTBLookups, "Number of BTB lookups"),
ADD_STAT(BTBHits, "Number of BTB hits"),
- ADD_STAT(BTBHitPct, "BTB Hit Percentage",
- (BTBHits / BTBLookups) * 100),
+ ADD_STAT(BTBHitRatio, "BTB Hit Ratio", BTBHits / BTBLookups),
ADD_STAT(RASUsed, "Number of times the RAS was used to get a
target."),
ADD_STAT(RASIncorrect, "Number of incorrect RAS predictions."),
ADD_STAT(indirectLookups, "Number of indirect predictor lookups."),
@@ -84,7 +83,7 @@
ADD_STAT(indirectMispredicted, "Number of mispredicted indirect"
" branches.")
{
- BTBHitPct.precision(6);
+ BTBHitRatio.precision(6);
}
ProbePoints::PMUUPtr
diff --git a/src/cpu/pred/bpred_unit.hh b/src/cpu/pred/bpred_unit.hh
index e445a39..ca164fa 100644
--- a/src/cpu/pred/bpred_unit.hh
+++ b/src/cpu/pred/bpred_unit.hh
@@ -290,8 +290,8 @@
Stats::Scalar BTBLookups;
/** Stat for number of BTB hits. */
Stats::Scalar BTBHits;
- /** Stat for percent times an entry in BTB found. */
- Stats::Formula BTBHitPct;
+ /** Stat for the ratio between BTB hits and BTB lookups. */
+ Stats::Formula BTBHitRatio;
/** Stat for number of times the RAS is used to get a target. */
Stats::Scalar RASUsed;
/** Stat for number of times the RAS is incorrect. */
diff --git a/src/mem/mem_ctrl.cc b/src/mem/mem_ctrl.cc
index c66d238..717e966 100644
--- a/src/mem/mem_ctrl.cc
+++ b/src/mem/mem_ctrl.cc
@@ -1224,8 +1224,8 @@
ADD_STAT(bytesWrittenSys,
"Total written bytes from the system interface side"),
- ADD_STAT(avgRdBWSys, "Average system read bandwidth in MiByte/s"),
- ADD_STAT(avgWrBWSys, "Average system write bandwidth in MiByte/s"),
+ ADD_STAT(avgRdBWSys, "Average system read bandwidth in Byte/s"),
+ ADD_STAT(avgWrBWSys, "Average system write bandwidth in Byte/s"),
ADD_STAT(totGap, "Total gap between requests"),
ADD_STAT(avgGap, "Average gap between requests"),
@@ -1276,8 +1276,8 @@
.init(ctrl.writeBufferSize)
.flags(nozero);
- avgRdBWSys.precision(2);
- avgWrBWSys.precision(2);
+ avgRdBWSys.precision(8);
+ avgWrBWSys.precision(8);
avgGap.precision(2);
// per-requestor bytes read and written to memory
@@ -1337,8 +1337,8 @@
}
// Formula stats
- avgRdBWSys = (bytesReadSys / 1000000) / simSeconds;
- avgWrBWSys = (bytesWrittenSys / 1000000) / simSeconds;
+ avgRdBWSys = (bytesReadSys) / simSeconds;
+ avgWrBWSys = (bytesWrittenSys) / simSeconds;
avgGap = totGap / (readReqs + writeReqs);
diff --git a/src/mem/xbar.cc b/src/mem/xbar.cc
index 7423374..6bf4baf 100644
--- a/src/mem/xbar.cc
+++ b/src/mem/xbar.cc
@@ -141,7 +141,7 @@
port(_port), xbar(_xbar), _name(xbar.name() + "." + _name),
state(IDLE),
waitingForPeer(NULL), releaseEvent([this]{ releaseLayer(); }, name()),
ADD_STAT(occupancy, "Layer occupancy (ticks)"),
- ADD_STAT(utilization, "Layer utilization (%)")
+ ADD_STAT(utilization, "Layer utilization")
{
occupancy
.flags(Stats::nozero);
@@ -150,7 +150,7 @@
.precision(1)
.flags(Stats::nozero);
- utilization = 100 * occupancy / simTicks;
+ utilization = occupancy / simTicks;
}
template <typename SrcType, typename DstType>
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I9832796e87698daa7f87f91fa39ce40bbf92e737
Gerrit-Change-Number: 41013
Gerrit-PatchSet: 5
Gerrit-Owner: Hoa Nguyen <hoangu...@ucdavis.edu>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Daniel Carvalho <oda...@yahoo.com.br>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Hoa Nguyen <hoangu...@ucdavis.edu>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Nikos Nikoleris <nikos.nikole...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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