Tiago Mück has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/41113 )

Change subject: mem-ruby: removes data ptr from RubyRequest
......................................................................

mem-ruby: removes data ptr from RubyRequest

It's redundant since we keep the PacketPtr.

Change-Id: I421ffe8a25ad6a96454d84c0726715fd87a451e6
---
M src/mem/ruby/slicc_interface/RubyRequest.cc
M src/mem/ruby/slicc_interface/RubyRequest.hh
M src/mem/ruby/system/Sequencer.cc
3 files changed, 9 insertions(+), 13 deletions(-)



diff --git a/src/mem/ruby/slicc_interface/RubyRequest.cc b/src/mem/ruby/slicc_interface/RubyRequest.cc
index f2099db..d45f3d2 100644
--- a/src/mem/ruby/slicc_interface/RubyRequest.cc
+++ b/src/mem/ruby/slicc_interface/RubyRequest.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019 ARM Limited
+ * Copyright (c) 2019,2021 ARM Limited
  * All rights reserved.
  *
  * The license below extends only to copyright in the software and shall
@@ -79,8 +79,10 @@
     // has to overwrite the data for the timing request, even if the
     // timing request has still not been ordered globally.

-    if (!data)
-      return false;
+    if (!pkt->hasData() || !m_pkt->hasData())
+        return false;
+
+    uint8_t *data =  m_pkt->getPtr<uint8_t>();

     Addr wBase = pkt->getAddr();
     Addr wTail = wBase + pkt->getSize();
diff --git a/src/mem/ruby/slicc_interface/RubyRequest.hh b/src/mem/ruby/slicc_interface/RubyRequest.hh
index ed8dbbb..d27a589 100644
--- a/src/mem/ruby/slicc_interface/RubyRequest.hh
+++ b/src/mem/ruby/slicc_interface/RubyRequest.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020 ARM Limited
+ * Copyright (c) 2020,2021 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -62,7 +62,6 @@
     RubyAccessMode m_AccessMode;
     int m_Size;
     PrefetchBit m_Prefetch;
-    uint8_t* data;
     PacketPtr m_pkt;
     ContextID m_contextId;
     WriteMask m_writeMask;
@@ -72,7 +71,7 @@
     bool m_htmFromTransaction;
     uint64_t m_htmTransactionUid;

-    RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len,
+    RubyRequest(Tick curTime, uint64_t _paddr, int _len,
         uint64_t _pc, RubyRequestType _type, RubyAccessMode _access_mode,
         PacketPtr _pkt, PrefetchBit _pb = PrefetchBit_No,
         ContextID _proc_id = 100, ContextID _core_id = 99)
@@ -83,7 +82,6 @@
           m_AccessMode(_access_mode),
           m_Size(_len),
           m_Prefetch(_pb),
-          data(_data),
           m_pkt(_pkt),
           m_contextId(_core_id),
           m_htmFromTransaction(false),
@@ -92,7 +90,7 @@
         m_LineAddress = makeLineAddress(m_PhysicalAddress);
     }

-    RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len,
+    RubyRequest(Tick curTime, uint64_t _paddr, int _len,
         uint64_t _pc, RubyRequestType _type,
         RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb,
         unsigned _proc_id, unsigned _core_id,
@@ -106,7 +104,6 @@
           m_AccessMode(_access_mode),
           m_Size(_len),
           m_Prefetch(_pb),
-          data(_data),
           m_pkt(_pkt),
           m_contextId(_core_id),
           m_writeMask(_wm_size,_wm_mask),
@@ -119,7 +116,7 @@
         m_LineAddress = makeLineAddress(m_PhysicalAddress);
     }

-    RubyRequest(Tick curTime, uint64_t _paddr, uint8_t* _data, int _len,
+    RubyRequest(Tick curTime, uint64_t _paddr, int _len,
         uint64_t _pc, RubyRequestType _type,
         RubyAccessMode _access_mode, PacketPtr _pkt, PrefetchBit _pb,
         unsigned _proc_id, unsigned _core_id,
@@ -134,7 +131,6 @@
           m_AccessMode(_access_mode),
           m_Size(_len),
           m_Prefetch(_pb),
-          data(_data),
           m_pkt(_pkt),
           m_contextId(_core_id),
           m_writeMask(_wm_size,_wm_mask,_atomicOps),
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 2d51f84..40e0cf4 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -770,8 +770,6 @@
     // requests do not
     std::shared_ptr<RubyRequest> msg =
         std::make_shared<RubyRequest>(clockEdge(), pkt->getAddr(),
-                                      pkt->isFlush() ?
-                                      nullptr : pkt->getPtr<uint8_t>(),
                                       pkt->getSize(), pc, secondary_type,
                                       RubyAccessMode_Supervisor, pkt,
                                       PrefetchBit_No, proc_id, core_id);

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I421ffe8a25ad6a96454d84c0726715fd87a451e6
Gerrit-Change-Number: 41113
Gerrit-PatchSet: 1
Gerrit-Owner: Tiago Mück <[email protected]>
Gerrit-MessageType: newchange
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