Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/39321 )

Change subject: arch: Eliminate the getArgument function.
......................................................................

arch: Eliminate the getArgument function.

This ISA switched function is no longer used. Eliminate it, and reduce
the number of functions used in the switched utility.hh header by one.

Change-Id: Ic6020c5fa6d976d9dbf1e9f517809acf9b0b7cd8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39321
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Maintainer: Gabe Black <gabe.bl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/utility.cc
M src/arch/arm/utility.hh
M src/arch/mips/utility.cc
M src/arch/mips/utility.hh
M src/arch/power/utility.cc
M src/arch/power/utility.hh
M src/arch/riscv/utility.hh
M src/arch/sparc/utility.cc
M src/arch/sparc/utility.hh
M src/arch/x86/utility.cc
M src/arch/x86/utility.hh
11 files changed, 2 insertions(+), 141 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 93e0a78..31408f6 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -53,64 +53,6 @@
 namespace ArmISA
 {

-uint64_t
-getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
-{
-    panic_if(!FullSystem,
-            "getArgument() only implemented for full system mode.");
-
- panic_if(fp, "getArgument(): Floating point arguments not implemented");
-
-    if (inAArch64(tc)) {
-        if (size == (uint16_t)(-1))
-            size = sizeof(uint64_t);
-
-        if (number < 8 /*NumArgumentRegs64*/) {
-               return tc->readIntReg(number);
-        } else {
- panic("getArgument(): No support reading stack args for AArch64\n");
-        }
-    } else {
-        if (size == (uint16_t)(-1))
-            size = sizeof(uint32_t);
-
-        if (number < NumArgumentRegs) {
-            // If the argument is 64 bits, it must be in an even regiser
-            // number. Increment the number here if it isn't even.
-            if (size == sizeof(uint64_t)) {
-                if ((number % 2) != 0)
-                    number++;
-                // Read the two halves of the data. Number is inc here to
-                // get the second half of the 64 bit reg.
-                uint64_t tmp;
-                tmp = tc->readIntReg(number++);
-                tmp |= tc->readIntReg(number) << 32;
-                return tmp;
-            } else {
-               return tc->readIntReg(number);
-            }
-        } else {
-            Addr sp = tc->readIntReg(StackPointerReg);
-            PortProxy &vp = tc->getVirtProxy();
-            uint64_t arg;
-            if (size == sizeof(uint64_t)) {
-                // If the argument is even it must be aligned
-                if ((number % 2) != 0)
-                    number++;
-                arg = vp.read<uint64_t>(sp +
-                        (number-NumArgumentRegs) * sizeof(uint32_t));
-                // since two 32 bit args == 1 64 bit arg, increment number
-                number++;
-            } else {
-                arg = vp.read<uint32_t>(sp +
- (number-NumArgumentRegs) * sizeof(uint32_t));
-            }
-            return arg;
-        }
-    }
-    panic("getArgument() should always return\n");
-}
-
 static void
 copyVecRegs(ThreadContext *src, ThreadContext *dest)
 {
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 453e461..e255b1c 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -400,8 +400,6 @@

 bool SPAlignmentCheckEnabled(ThreadContext* tc);

-uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
-
 inline void
 advancePC(PCState &pc, const StaticInstPtr &inst)
 {
diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc
index db4e110..78fa3e2 100644
--- a/src/arch/mips/utility.cc
+++ b/src/arch/mips/utility.cc
@@ -43,12 +43,6 @@
 namespace MipsISA {

 uint64_t
-getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
-{
-    panic("getArgument() not implemented\n");
-}
-
-uint64_t
 fpConvert(ConvertType cvt_type, double fp_val)
 {

diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index 23d92c1..0cb9349 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -49,8 +49,6 @@
     return ret;
 }

-uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
-
 ////////////////////////////////////////////////////////////////////////
 //
 // Floating Point Utility Functions
diff --git a/src/arch/power/utility.cc b/src/arch/power/utility.cc
index da4748d..bed0be9 100644
--- a/src/arch/power/utility.cc
+++ b/src/arch/power/utility.cc
@@ -55,11 +55,4 @@
     dest->pcState(src->pcState());
 }

-uint64_t
-getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
-{
-    panic("getArgument not implemented for POWER.\n");
-    return 0;
-}
-
 } // namespace PowerISA
diff --git a/src/arch/power/utility.hh b/src/arch/power/utility.hh
index 3a4b16c..9092a23 100644
--- a/src/arch/power/utility.hh
+++ b/src/arch/power/utility.hh
@@ -58,8 +58,6 @@
     pc.advance();
 }

-uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
-
 static inline bool
 inUserMode(ThreadContext *tc)
 {
diff --git a/src/arch/riscv/utility.hh b/src/arch/riscv/utility.hh
index 816d36c..c2f4ac8 100644
--- a/src/arch/riscv/utility.hh
+++ b/src/arch/riscv/utility.hh
@@ -107,19 +107,6 @@
     return retPC;
 }

-inline uint64_t
-getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
-{
- panic_if(fp, "getArgument(): Floating point arguments not implemented"); - panic_if(size != 8, "getArgument(): Can only handle 64-bit arguments.");
-    panic_if(number >= ArgumentRegs.size(),
-             "getArgument(): Don't know how to handle stack arguments");
-
-    // The first 8 integer arguments are passed in registers, the rest
-    // are passed on the stack.
-    return tc->readIntReg(ArgumentRegs[number]);
-}
-
 inline void
 copyRegs(ThreadContext *src, ThreadContext *dest)
 {
diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc
index 66fabd1..a0c0f8b 100644
--- a/src/arch/sparc/utility.cc
+++ b/src/arch/sparc/utility.cc
@@ -31,31 +31,8 @@
 #include "arch/sparc/faults.hh"
 #include "mem/port_proxy.hh"

-namespace SparcISA {
-
-
-// The caller uses %o0-%05 for the first 6 arguments even if their floating
-// point. Double precision floating point values take two registers/args.
-// Quads, structs, and unions are passed as pointers. All arguments beyond
-// the sixth are passed on the stack past the 16 word window save area,
-// space for the struct/union return pointer, and space reserved for the
-// first 6 arguments which the caller may use but doesn't have to.
-uint64_t
-getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
+namespace SparcISA
 {
- panic_if(!FullSystem, "getArgument() only implemented for full system");
-
-    const int NumArgumentRegs = 6;
-    if (number < NumArgumentRegs) {
-        return tc->readIntReg(8 + number);
-    } else {
-        Addr sp = tc->readIntReg(StackPointerReg);
-        PortProxy &vp = tc->getVirtProxy();
-        uint64_t arg = vp.read<uint64_t>(sp + 92 +
-                            (number-NumArgumentRegs) * sizeof(uint64_t));
-        return arg;
-    }
-}

 void
 copyMiscRegs(ThreadContext *src, ThreadContext *dest)
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 3f36f03..18b5164 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -50,8 +50,6 @@
     return ret;
 }

-uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
-
 static inline bool
 inUserMode(ThreadContext *tc)
 {
diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc
index 7d891af..c664620 100644
--- a/src/arch/x86/utility.cc
+++ b/src/arch/x86/utility.cc
@@ -46,29 +46,8 @@
 #include "fputils/fp80.h"
 #include "sim/full_system.hh"

-namespace X86ISA {
-
-uint64_t
-getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
+namespace X86ISA
 {
-    if (fp) {
-        panic("getArgument(): Floating point arguments not implemented\n");
-    } else if (size != 8) {
-        panic("getArgument(): Can only handle 64-bit arguments.\n");
-    }
-
-    // The first 6 integer arguments are passed in registers, the rest
-    // are passed on the stack.
-    const int int_reg_map[] = {
-        INTREG_RDI, INTREG_RSI, INTREG_RDX,
-        INTREG_RCX, INTREG_R8, INTREG_R9
-    };
-    if (number < sizeof(int_reg_map) / sizeof(*int_reg_map)) {
-        return tc->readIntReg(int_reg_map[number]);
-    } else {
- panic("getArgument(): Don't know how to handle stack arguments.\n");
-    }
-}

 void
 copyMiscRegs(ThreadContext *src, ThreadContext *dest)
diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh
index 50f65ef..1ff7b16 100644
--- a/src/arch/x86/utility.hh
+++ b/src/arch/x86/utility.hh
@@ -53,9 +53,6 @@
         return retPC;
     }

-    uint64_t
-    getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
-
     static inline bool
     inUserMode(ThreadContext *tc)
     {

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/39321
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic6020c5fa6d976d9dbf1e9f517809acf9b0b7cd8
Gerrit-Change-Number: 39321
Gerrit-PatchSet: 5
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Boris Shingarov <shinga...@gmail.com>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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