Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/41898 )
Change subject: arch-arm: Switch the AAPCS ABIs to .as<>() instead
of .laneView<>().
......................................................................
arch-arm: Switch the AAPCS ABIs to .as<>() instead of .laneView<>().
Change-Id: I9e9c7163db4c061af00111b8dc959c364c6b7ae6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41898
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/arm/aapcs32.hh
M src/arch/arm/aapcs64.hh
2 files changed, 6 insertions(+), 6 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/aapcs32.hh b/src/arch/arm/aapcs32.hh
index a1345bd..c450237 100644
--- a/src/arch/arm/aapcs32.hh
+++ b/src/arch/arm/aapcs32.hh
@@ -463,7 +463,7 @@
RegId id(VecRegClass, 0);
auto reg = tc->readVecReg(id);
- reg.laneView<Float, 0>() = f;
+ reg.as<Float>()[0] = f;
tc->setVecReg(id, reg);
};
};
@@ -487,7 +487,7 @@
RegId id(VecRegClass, reg);
auto val = tc->readVecReg(id);
- return val.laneView<Float>(lane);
+ return val.as<Float>()[lane];
}
return loadFromStack<Float>(tc, state);
@@ -558,7 +558,7 @@
RegId id(VecRegClass, reg);
auto val = tc->readVecReg(id);
- ha[i] = val.laneView<Elem>(lane);
+ ha[i] = val.as<Elem>()[lane];
}
return ha;
}
@@ -605,7 +605,7 @@
RegId id(VecRegClass, reg);
auto val = tc->readVecReg(id);
- val.laneView<Elem>(lane) = ha[i];
+ val.as<Elem>()[lane] = ha[i];
tc->setVecReg(id, val);
}
}
diff --git a/src/arch/arm/aapcs64.hh b/src/arch/arm/aapcs64.hh
index fb7b8f8..ddd5606 100644
--- a/src/arch/arm/aapcs64.hh
+++ b/src/arch/arm/aapcs64.hh
@@ -186,7 +186,7 @@
{
if (state.nsrn <= state.MAX_SRN) {
RegId id(VecRegClass, state.nsrn++);
- return tc->readVecReg(id).laneView<Float, 0>();
+ return tc->readVecReg(id).as<Float>()[0];
}
return loadFromStack<Float>(tc, state);
@@ -203,7 +203,7 @@
{
RegId id(VecRegClass, 0);
auto reg = tc->readVecReg(id);
- reg.laneView<Float, 0>() = f;
+ reg.as<Float>()[0] = f;
tc->setVecReg(id, reg);
}
};
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I9e9c7163db4c061af00111b8dc959c364c6b7ae6
Gerrit-Change-Number: 41898
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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