[gem5-dev] Change in gem5/gem5[develop]: arch-sparc: Move non-public values out of registers.hh.

Gabe Black (Gerrit) via gem5-dev Wed, 31 Mar 2021 17:24:48 -0700

Gabe Black has submitted this change. (https://gem5-review.googlesource.com/c/public/gem5/+/41741 )


Change subject: arch-sparc: Move non-public values out of registers.hh.
......................................................................


arch-sparc: Move non-public values out of registers.hh.

Change-Id: If5f1c09b3988bc009821330ca128ff22a54c0e88
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41741
Maintainer: Bobby R. Bruce <bbr...@ucdavis.edu>
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Gabe Black <gabe.bl...@gmail.com>
---
M src/arch/sparc/decoder.hh
M src/arch/sparc/faults.cc
M src/arch/sparc/insts/static_inst.cc
M src/arch/sparc/interrupts.hh
M src/arch/sparc/isa.cc
M src/arch/sparc/isa.hh
M src/arch/sparc/isa/includes.isa
M src/arch/sparc/linux/linux.hh
M src/arch/sparc/nativetrace.cc
M src/arch/sparc/process.cc
M src/arch/sparc/registers.hh
A src/arch/sparc/regs/float.hh
A src/arch/sparc/regs/int.hh
R src/arch/sparc/regs/misc.hh
M src/arch/sparc/remote_gdb.cc
M src/arch/sparc/se_workload.cc
M src/arch/sparc/se_workload.hh
M src/arch/sparc/tlb.cc
M src/arch/sparc/ua2005.cc
19 files changed, 149 insertions(+), 67 deletions(-)

Approvals:
  Gabe Black: Looks good to me, approved
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 340733d..4530f77 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -31,7 +31,6 @@

 #include "arch/generic/decode_cache.hh"
 #include "arch/generic/decoder.hh"
-#include "arch/sparc/registers.hh"
 #include "arch/sparc/types.hh"
 #include "cpu/static_inst.hh"
 #include "debug/Decode.hh"
diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc
index a80e649..408c5c4 100644
--- a/src/arch/sparc/faults.cc
+++ b/src/arch/sparc/faults.cc
@@ -33,6 +33,7 @@
 #include "arch/sparc/mmu.hh"
 #include "arch/sparc/process.hh"
 #include "arch/sparc/se_workload.hh"
+#include "arch/sparc/sparc_traits.hh"
 #include "arch/sparc/types.hh"
 #include "base/bitfield.hh"
 #include "base/trace.hh"

diff --git a/src/arch/sparc/insts/static_inst.ccb/src/arch/sparc/insts/static_inst.cc

index 65a38ff..72e4c6b 100644
--- a/src/arch/sparc/insts/static_inst.cc
+++ b/src/arch/sparc/insts/static_inst.cc
@@ -29,8 +29,8 @@

 #include "arch/sparc/insts/static_inst.hh"

-#include "arch/sparc/miscregs.hh"
-#include "arch/sparc/registers.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "base/bitunion.hh"

 namespace SparcISA
diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh
index 3edac8c..76885b5 100644
--- a/src/arch/sparc/interrupts.hh
+++ b/src/arch/sparc/interrupts.hh
@@ -31,8 +31,7 @@

 #include "arch/generic/interrupts.hh"
 #include "arch/sparc/faults.hh"
-#include "arch/sparc/miscregs.hh"
-#include "arch/sparc/registers.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "cpu/thread_context.hh"
 #include "debug/Interrupt.hh"
 #include "params/SparcInterrupts.hh"
diff --git a/src/arch/sparc/isa.cc b/src/arch/sparc/isa.cc
index 9297462..5585ee0 100644
--- a/src/arch/sparc/isa.cc
+++ b/src/arch/sparc/isa.cc
@@ -31,7 +31,10 @@
 #include "arch/sparc/asi.hh"
 #include "arch/sparc/decoder.hh"
 #include "arch/sparc/interrupts.hh"
-#include "arch/sparc/miscregs.hh"
+#include "arch/sparc/regs/float.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
+#include "arch/sparc/sparc_traits.hh"
 #include "base/bitfield.hh"
 #include "base/trace.hh"
 #include "cpu/base.hh"
diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh
index 559557c..3c2202a 100644
--- a/src/arch/sparc/isa.hh
+++ b/src/arch/sparc/isa.hh
@@ -33,7 +33,9 @@
 #include <string>

 #include "arch/generic/isa.hh"
-#include "arch/sparc/miscregs.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
+#include "arch/sparc/sparc_traits.hh"
 #include "arch/sparc/types.hh"
 #include "cpu/reg_class.hh"
 #include "sim/sim_object.hh"

diff --git a/src/arch/sparc/isa/includes.isab/src/arch/sparc/isa/includes.isa

index afc2c4f..dba7f18 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -46,8 +46,8 @@
 #include "arch/sparc/insts/trap.hh"
 #include "arch/sparc/insts/unimp.hh"
 #include "arch/sparc/insts/unknown.hh"
-#include "arch/sparc/miscregs.hh"
-#include "arch/sparc/registers.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "base/condcodes.hh"
 #include "base/logging.hh"
 #include "cpu/static_inst.hh"
diff --git a/src/arch/sparc/linux/linux.hh b/src/arch/sparc/linux/linux.hh
index 1624e2c..c47275a 100644
--- a/src/arch/sparc/linux/linux.hh
+++ b/src/arch/sparc/linux/linux.hh
@@ -30,7 +30,8 @@
 #define __ARCH_SPARC_LINUX_LINUX_HH__

 #include "arch/sparc/asi.hh"
-#include "arch/sparc/miscregs.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "cpu/thread_context.hh"
 #include "kern/linux/linux.hh"

diff --git a/src/arch/sparc/nativetrace.cc b/src/arch/sparc/nativetrace.cc
index 7f528a2..da279ef 100644
--- a/src/arch/sparc/nativetrace.cc
+++ b/src/arch/sparc/nativetrace.cc
@@ -28,7 +28,7 @@

 #include "arch/sparc/nativetrace.hh"

-#include "arch/sparc/registers.hh"
+#include "arch/sparc/regs/int.hh"
 #include "cpu/thread_context.hh"
 #include "params/SparcNativeTrace.hh"
 #include "sim/byteswap.hh"
diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index 33ba756..043cce7 100644
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -30,9 +30,9 @@

 #include "arch/sparc/asi.hh"
 #include "arch/sparc/handlers.hh"
-#include "arch/sparc/miscregs.hh"
 #include "arch/sparc/page_size.hh"
-#include "arch/sparc/registers.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "arch/sparc/types.hh"
 #include "base/loader/elf_object.hh"
 #include "base/loader/object_file.hh"
diff --git a/src/arch/sparc/registers.hh b/src/arch/sparc/registers.hh
index 1404a1d..62fd3f5 100644
--- a/src/arch/sparc/registers.hh
+++ b/src/arch/sparc/registers.hh
@@ -31,8 +31,6 @@

 #include "arch/generic/vec_pred_reg.hh"
 #include "arch/generic/vec_reg.hh"
-#include "arch/sparc/sparc_traits.hh"
-#include "base/types.hh"

 namespace SparcISA
 {
@@ -52,50 +50,7 @@
 constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
 constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;

-// semantically meaningful register indices
-enum {
-    // Globals
-    INTREG_G0, INTREG_G1, INTREG_G2, INTREG_G3,
-    INTREG_G4, INTREG_G5, INTREG_G6, INTREG_G7,
-    // Outputs
-    INTREG_O0, INTREG_O1, INTREG_O2, INTREG_O3,
-    INTREG_O4, INTREG_O5, INTREG_O6, INTREG_O7,
-    // Locals
-    INTREG_L0, INTREG_L1, INTREG_L2, INTREG_L3,
-    INTREG_L4, INTREG_L5, INTREG_L6, INTREG_L7,
-    // Inputs
-    INTREG_I0, INTREG_I1, INTREG_I2, INTREG_I3,
-    INTREG_I4, INTREG_I5, INTREG_I6, INTREG_I7,
-
-    NumIntArchRegs,
-
-    INTREG_UREG0 = NumIntArchRegs,
-    INTREG_Y,
-    INTREG_CCR,
-    INTREG_CANSAVE,
-    INTREG_CANRESTORE,
-    INTREG_CLEANWIN,
-    INTREG_OTHERWIN,
-    INTREG_WSTATE,
-    INTREG_GSR,
-
-    NumMicroIntRegs = INTREG_GSR - INTREG_UREG0 + 1
-};
-const int ZeroReg = 0;      // architecturally meaningful
-
-// the rest of these depend on the ABI
-const int ReturnAddressReg = INTREG_I7; // post call, precall is 15
-const int ReturnValueReg = INTREG_O0;  // Post return, 24 is pre-return.
-const int StackPointerReg = INTREG_O6;
-const int FramePointerReg = INTREG_I6;
-
-// Some OS syscall use a second register to return a second value
-const int SyscallPseudoReturnReg = INTREG_O1;
-
-const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs;
-
-const int NumFloatRegs = 64;
-const int NumFloatArchRegs = NumFloatRegs;
+const int ZeroReg = 0;

 } // namespace SparcISA

diff --git a/src/arch/sparc/regs/float.hh b/src/arch/sparc/regs/float.hh
new file mode 100644
index 0000000..7cae8cd
--- /dev/null
+++ b/src/arch/sparc/regs/float.hh
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ARCH_SPARC_REGS_FLOAT_HH__
+#define __ARCH_SPARC_REGS_FLOAT_HH__
+
+namespace SparcISA
+{
+
+const int NumFloatRegs = 64;
+const int NumFloatArchRegs = NumFloatRegs;
+
+} // namespace SparcISA
+
+#endif
diff --git a/src/arch/sparc/regs/int.hh b/src/arch/sparc/regs/int.hh
new file mode 100644
index 0000000..d5c82ae
--- /dev/null
+++ b/src/arch/sparc/regs/int.hh
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __ARCH_SPARC_REGS_INT_HH__
+#define __ARCH_SPARC_REGS_INT_HH__
+
+#include "arch/sparc/sparc_traits.hh"
+
+namespace SparcISA
+{
+
+// semantically meaningful register indices
+enum {
+    // Globals
+    INTREG_G0, INTREG_G1, INTREG_G2, INTREG_G3,
+    INTREG_G4, INTREG_G5, INTREG_G6, INTREG_G7,
+    // Outputs
+    INTREG_O0, INTREG_O1, INTREG_O2, INTREG_O3,
+    INTREG_O4, INTREG_O5, INTREG_O6, INTREG_O7,
+    // Locals
+    INTREG_L0, INTREG_L1, INTREG_L2, INTREG_L3,
+    INTREG_L4, INTREG_L5, INTREG_L6, INTREG_L7,
+    // Inputs
+    INTREG_I0, INTREG_I1, INTREG_I2, INTREG_I3,
+    INTREG_I4, INTREG_I5, INTREG_I6, INTREG_I7,
+
+    NumIntArchRegs,
+
+    INTREG_UREG0 = NumIntArchRegs,
+    INTREG_Y,
+    INTREG_CCR,
+    INTREG_CANSAVE,
+    INTREG_CANRESTORE,
+    INTREG_CLEANWIN,
+    INTREG_OTHERWIN,
+    INTREG_WSTATE,
+    INTREG_GSR,
+
+    NumMicroIntRegs = INTREG_GSR - INTREG_UREG0 + 1
+};
+
+// the rest of these depend on the ABI
+const int ReturnAddressReg = INTREG_I7; // post call, precall is 15
+const int ReturnValueReg = INTREG_O0;  // Post return, 24 is pre-return.
+const int StackPointerReg = INTREG_O6;
+const int FramePointerReg = INTREG_I6;
+
+// Some OS syscall use a second register to return a second value
+const int SyscallPseudoReturnReg = INTREG_O1;
+
+const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs;
+
+} // namespace SparcISA
+
+#endif
diff --git a/src/arch/sparc/miscregs.hh b/src/arch/sparc/regs/misc.hh
similarity index 97%
rename from src/arch/sparc/miscregs.hh
rename to src/arch/sparc/regs/misc.hh
index 3602c8e..5c9706f 100644
--- a/src/arch/sparc/miscregs.hh
+++ b/src/arch/sparc/regs/misc.hh
@@ -26,8 +26,8 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */

-#ifndef __ARCH_SPARC_MISCREGS_HH__
-#define __ARCH_SPARC_MISCREGS_HH__
+#ifndef __ARCH_SPARC_REGS_MISC_HH__
+#define __ARCH_SPARC_REGS_MISC_HH__

 #include "base/bitunion.hh"
 #include "base/types.hh"
diff --git a/src/arch/sparc/remote_gdb.cc b/src/arch/sparc/remote_gdb.cc
index 10c5c1f..1a1042d 100644
--- a/src/arch/sparc/remote_gdb.cc
+++ b/src/arch/sparc/remote_gdb.cc
@@ -124,7 +124,8 @@
 #include <csignal>
 #include <string>

-#include "arch/sparc/miscregs.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "base/intmath.hh"
 #include "base/remote_gdb.hh"
 #include "base/socket.hh"
diff --git a/src/arch/sparc/se_workload.cc b/src/arch/sparc/se_workload.cc
index 19a4e2b..b651b05 100644
--- a/src/arch/sparc/se_workload.cc
+++ b/src/arch/sparc/se_workload.cc
@@ -28,7 +28,8 @@
 #include "arch/sparc/se_workload.hh"

 #include "arch/sparc/process.hh"
-#include "arch/sparc/registers.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "arch/sparc/types.hh"
 #include "base/logging.hh"
 #include "cpu/thread_context.hh"
diff --git a/src/arch/sparc/se_workload.hh b/src/arch/sparc/se_workload.hh
index 7303010..0ad572a 100644
--- a/src/arch/sparc/se_workload.hh
+++ b/src/arch/sparc/se_workload.hh
@@ -30,7 +30,8 @@

 #include <vector>

-#include "arch/sparc/miscregs.hh"
+#include "arch/sparc/regs/int.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "base/loader/object_file.hh"
 #include "cpu/thread_context.hh"
 #include "sim/se_workload.hh"
diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc
index 4efe635..380b365 100644
--- a/src/arch/sparc/tlb.cc
+++ b/src/arch/sparc/tlb.cc
@@ -33,9 +33,8 @@
 #include "arch/sparc/asi.hh"
 #include "arch/sparc/faults.hh"
 #include "arch/sparc/interrupts.hh"
-#include "arch/sparc/miscregs.hh"
 #include "arch/sparc/mmu.hh"
-#include "arch/sparc/registers.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "base/bitfield.hh"
 #include "base/compiler.hh"
 #include "base/trace.hh"
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index 118a263..42e0bf5 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -28,7 +28,7 @@

 #include "arch/sparc/interrupts.hh"
 #include "arch/sparc/isa.hh"
-#include "arch/sparc/registers.hh"
+#include "arch/sparc/regs/misc.hh"
 #include "base/bitfield.hh"
 #include "base/trace.hh"
 #include "cpu/base.hh"



9 is the latest approved patch-set.

No files were changed between the latest approved patch-set and thesubmitted one.

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: If5f1c09b3988bc009821330ca128ff22a54c0e88
Gerrit-Change-Number: 41741
Gerrit-PatchSet: 11
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Boris Shingarov <shinga...@gmail.com>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged

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[gem5-dev] Change in gem5/gem5[develop]: arch-sparc: Move non-public values out of registers.hh.

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