Sandipan Das has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/40920 )
Change subject: arch-power: Add zero count instructions
......................................................................
arch-power: Add zero count instructions
This introduces new helpers for finding the count of
leading and trailing zero bits in a given value and adds
the following instructions.
* Count Trailing Zeros Word (cnttzw[.])
* Count Leading Zeros Doubleword (cntlzd[.])
* Count Trailing Zeros Doubleword (cnttzd[.])
Change-Id: I69dad34bc2cffb2ac70ecd3dba7301fa1cdcb340
Signed-off-by: Sandipan Das <sandi...@linux.ibm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40920
Reviewed-by: Boris Shingarov <shinga...@labware.com>
Maintainer: Boris Shingarov <shinga...@labware.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/power/insts/integer.cc
M src/arch/power/insts/integer.hh
M src/arch/power/isa/decoder.isa
3 files changed, 64 insertions(+), 2 deletions(-)
Approvals:
Boris Shingarov: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/power/insts/integer.cc
b/src/arch/power/insts/integer.cc
index d7c8ed4..12ce7ee 100644
--- a/src/arch/power/insts/integer.cc
+++ b/src/arch/power/insts/integer.cc
@@ -287,7 +287,10 @@
} else if (myMnemonic == "extsb" ||
myMnemonic == "extsh" ||
myMnemonic == "extsw" ||
- myMnemonic == "cntlzw") {
+ myMnemonic == "cntlzw" ||
+ myMnemonic == "cntlzd" ||
+ myMnemonic == "cnttzw" ||
+ myMnemonic == "cnttzd") {
printSecondSrc = false;
}
diff --git a/src/arch/power/insts/integer.hh
b/src/arch/power/insts/integer.hh
index 53e8a4a..481b11b 100644
--- a/src/arch/power/insts/integer.hh
+++ b/src/arch/power/insts/integer.hh
@@ -484,6 +484,8 @@
{
}
+ /* Compute the number of consecutive zero bits starting from the
+ leftmost bit and moving right in a 32-bit integer */
inline int
findLeadingZeros(uint32_t rs) const
{
@@ -499,6 +501,57 @@
}
}
+ /* Compute the number of consecutive zero bits starting from the
+ leftmost bit and moving right in a 64-bit integer */
+ inline int
+ findLeadingZeros(uint64_t rs) const
+ {
+ if (rs) {
+ #if defined(__GNUC__) || (defined(__clang__) && \
+ __has_builtin(__builtin_clzll))
+ return __builtin_clzll(rs);
+ #else
+ return 63 - findMsbSet(rs);
+ #endif
+ } else {
+ return 64;
+ }
+ }
+
+ /* Compute the number of consecutive zero bits starting from the
+ rightmost bit and moving left in a 32-bit integer */
+ inline int
+ findTrailingZeros(uint32_t rs) const
+ {
+ if (rs) {
+ #if defined(__GNUC__) || (defined(__clang__) && \
+ __has_builtin(__builtin_ctz))
+ return __builtin_ctz(rs);
+ #else
+ return findLsbSet(rs);
+ #endif
+ } else {
+ return 32;
+ }
+ }
+
+ /* Compute the number of consecutive zero bits starting from the
+ rightmost bit and moving left in a 64-bit integer */
+ inline int
+ findTrailingZeros(uint64_t rs) const
+ {
+ if (rs) {
+ #if defined(__GNUC__) || (defined(__clang__) && \
+ __has_builtin(__builtin_ctzll))
+ return __builtin_ctzll(rs);
+ #else
+ return findLsbSet(rs);
+ #endif
+ } else {
+ return 64;
+ }
+ }
+
std::string generateDisassembly(
Addr pc, const Loader::SymbolTable *symtab) const override;
};
diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index 0ec249e..15ad7ad 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -267,7 +267,11 @@
53: LoadIndexUpdateOp::ldux({{ Rt = Mem; }});
55: LoadIndexUpdateOp::lwzux({{ Rt = Mem_uw; }});
- 60: IntLogicOp::andc({{ Ra = Rs & ~Rb; }}, true);
+
+ format IntLogicOp {
+ 58: cntlzd({{ Ra = findLeadingZeros(Rs); }}, true);
+ 60: andc({{ Ra = Rs & ~Rb; }}, true);
+ }
format LoadIndexOp {
84: ldarx({{
@@ -434,7 +438,9 @@
}
}});
+ 538: IntLogicOp::cnttzw({{ Ra = findTrailingZeros(Rs_uw); }},
true);
567: LoadIndexUpdateOp::lfsux({{ Ft_sf = Mem_sf; }});
+ 570: IntLogicOp::cnttzd({{ Ra = findTrailingZeros(Rs); }}, true);
598: MiscOp::sync({{ }}, [ IsReadBarrier, IsWriteBarrier ]);
599: LoadIndexOp::lfdx({{ Ft = Mem_df; }});
631: LoadIndexUpdateOp::lfdux({{ Ft = Mem_df; }});
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I69dad34bc2cffb2ac70ecd3dba7301fa1cdcb340
Gerrit-Change-Number: 40920
Gerrit-PatchSet: 8
Gerrit-Owner: Sandipan Das <sandi...@linux.ibm.com>
Gerrit-Reviewer: Boris Shingarov <shinga...@labware.com>
Gerrit-Reviewer: Sandipan Das <sandi...@linux.ibm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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