Matt Sinclair has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/48344 )
Change subject: arch-gcn3: Validate if scalar sources are scalar gprs
......................................................................
arch-gcn3: Validate if scalar sources are scalar gprs
Scalar sources can either be a general-purpose register or a constant
register that holds a single value.
If we don't check for if the register is a general-purpose register,
it's possible that we get a constant register, which then causes all of
the register mapping code to break, as the constant registers aren't
supposed to be mapped like the general-purpose registers are.
This fix adds an isScalarReg check to the instruction encodings that
were missing it.
Change-Id: I3d7d5393aa324737301c3269cc227b60e8a159e4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48344
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Matt Sinclair <mattdsincl...@gmail.com>
Reviewed-by: Bobby R. Bruce <bbr...@ucdavis.edu>
Reviewed-by: Matthew Poremba <matthew.pore...@amd.com>
Maintainer: Matt Sinclair <mattdsincl...@gmail.com>
---
M src/arch/amdgpu/gcn3/insts/op_encodings.cc
1 file changed, 6 insertions(+), 6 deletions(-)
Approvals:
Matthew Poremba: Looks good to me, approved
Matt Sinclair: Looks good to me, but someone else must approve; Looks
good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/amdgpu/gcn3/insts/op_encodings.cc
b/src/arch/amdgpu/gcn3/insts/op_encodings.cc
index cbbb767..cf20a2e 100644
--- a/src/arch/amdgpu/gcn3/insts/op_encodings.cc
+++ b/src/arch/amdgpu/gcn3/insts/op_encodings.cc
@@ -1277,12 +1277,12 @@
reg = extData.SRSRC;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
reg = extData.SOFFSET;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
}
@@ -1368,12 +1368,12 @@
reg = extData.SRSRC;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
reg = extData.SOFFSET;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
// extData.VDATA moves in the reg list depending on the instruction
@@ -1441,13 +1441,13 @@
reg = extData.SRSRC;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
if (getNumOperands() == 4) {
reg = extData.SSAMP;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
}
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
--
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Gerrit-Project: public/gem5
Gerrit-Branch: release-staging-v21-1
Gerrit-Change-Id: I3d7d5393aa324737301c3269cc227b60e8a159e4
Gerrit-Change-Number: 48344
Gerrit-PatchSet: 3
Gerrit-Owner: Kyle Roarty <kyleroarty1...@gmail.com>
Gerrit-Reviewer: Alex Dutu <alexandru.d...@amd.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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