Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/48150 )
Change subject: arch-arm: Add a shared L2 TLB to the default ArmMMU
......................................................................
arch-arm: Add a shared L2 TLB to the default ArmMMU
JIRA: https://gem5.atlassian.net/browse/GEM5-790
Change-Id: I542c287a99c8b277afb4cd939c09521798dcf2f8
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48150
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com>
Maintainer: Andreas Sandberg <andreas.sandb...@arm.com>
---
M src/arch/arm/ArmMMU.py
1 file changed, 6 insertions(+), 2 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/ArmMMU.py b/src/arch/arm/ArmMMU.py
index 6f54373..29acbbc 100644
--- a/src/arch/arm/ArmMMU.py
+++ b/src/arch/arm/ArmMMU.py
@@ -63,8 +63,12 @@
cxx_class = 'gem5::ArmISA::MMU'
cxx_header = 'arch/arm/mmu.hh'
- itb = ArmTLB(entry_type="instruction")
- dtb = ArmTLB(entry_type="data")
+ # L2 TLBs
+ l2_shared = ArmTLB(entry_type="unified", size=1280)
+
+ # L1 TLBs
+ itb = ArmTLB(entry_type="instruction", next_level=Parent.l2_shared)
+ dtb = ArmTLB(entry_type="data", next_level=Parent.l2_shared)
sys = Param.System(Parent.any, "system object parameter")
8 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I542c287a99c8b277afb4cd939c09521798dcf2f8
Gerrit-Change-Number: 48150
Gerrit-PatchSet: 13
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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