Hoa Nguyen has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/49283 )
Change subject: sim: Make loading workloads to memory optional
......................................................................
sim: Make loading workloads to memory optional
There are use cases of gem5 that memory being an external
component and does not exist until after gem5 being instantiated.
Change-Id: I2fefad67072d7bab37ff6f732a76a5ba507cd602
Signed-off-by: Hoa Nguyen <hoangu...@ucdavis.edu>
---
M src/sim/Workload.py
M src/sim/kernel_workload.cc
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/sim/Workload.py b/src/sim/Workload.py
index 62aa047..03238c0 100644
--- a/src/sim/Workload.py
+++ b/src/sim/Workload.py
@@ -54,6 +54,9 @@
"auto-calculated to be the most restrictive.")
load_addr_offset = Param.UInt64(0, "Address to offset the kernel with")
+ load_workload_to_memory = Param.Bool(True,
+ "whether to load the workload to memory")
+
command_line = Param.String("a", "boot flags to pass to the kernel")
class SEWorkloadMeta(type(Workload)):
diff --git a/src/sim/kernel_workload.cc b/src/sim/kernel_workload.cc
index c338b23..cdc081d 100644
--- a/src/sim/kernel_workload.cc
+++ b/src/sim/kernel_workload.cc
@@ -112,12 +112,14 @@
_start, _end, mapper(_start), mapper(_end));
}
// Load program sections into memory
- image.write(phys_mem);
+ if (params().load_workload_to_memory)
+ image.write(phys_mem);
DPRINTF(Loader, "Kernel start = %#x\n", _start);
DPRINTF(Loader, "Kernel end = %#x\n", _end);
DPRINTF(Loader, "Kernel entry = %#x\n", kernelObj->entryPoint());
- DPRINTF(Loader, "Kernel loaded...\n");
+ if (params().load_workload_to_memory)
+ DPRINTF(Loader, "Kernel loaded...\n");
}
std::vector<Addr> extras_addrs = params().extras_addrs;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2fefad67072d7bab37ff6f732a76a5ba507cd602
Gerrit-Change-Number: 49283
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen <hoangu...@ucdavis.edu>
Gerrit-MessageType: newchange
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