Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/49617 )
Change subject: fastmodel: Fix for the new gem5 namespace.
......................................................................
fastmodel: Fix for the new gem5 namespace.
Change-Id: Iacb6291e6ee93aecf5208d283eab9c1b5938bb2b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49617
Reviewed-by: Bobby R. Bruce <[email protected]>
Maintainer: Bobby R. Bruce <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
M src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
M src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
M src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa
M src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa
5 files changed, 21 insertions(+), 21 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
b/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
index 8ce0a52..c7d46ff 100644
--- a/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
+++ b/src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
@@ -366,8 +366,8 @@
class FastModelScxEvsCortexA76x1(SystemC_ScModule):
type = 'FastModelScxEvsCortexA76x1'
- cxx_class = \
- 'gem5::fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x1Types>'
+ cxx_class = 'gem5::fastmodel::ScxEvsCortexA76<' \
+ 'gem5::fastmodel::ScxEvsCortexA76x1Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'
@@ -378,8 +378,8 @@
class FastModelScxEvsCortexA76x2(SystemC_ScModule):
type = 'FastModelScxEvsCortexA76x2'
- cxx_class = \
- 'gem5::fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x2Types>'
+ cxx_class = 'gem5::fastmodel::ScxEvsCortexA76<' \
+ 'gem5::fastmodel::ScxEvsCortexA76x2Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'
@@ -391,8 +391,8 @@
class FastModelScxEvsCortexA76x3(SystemC_ScModule):
type = 'FastModelScxEvsCortexA76x3'
- cxx_class = \
- 'gem5::fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x3Types>'
+ cxx_class = 'gem5::fastmodel::ScxEvsCortexA76<' \
+ 'gem5::fastmodel::ScxEvsCortexA76x3Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'
@@ -405,8 +405,8 @@
class FastModelScxEvsCortexA76x4(SystemC_ScModule):
type = 'FastModelScxEvsCortexA76x4'
- cxx_class = \
- 'gem5::fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x4Types>'
+ cxx_class = 'gem5::fastmodel::ScxEvsCortexA76<' \
+ 'gem5::fastmodel::ScxEvsCortexA76x4Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'
diff --git a/src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
b/src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
index 7c8a0fa..9404edf 100644
--- a/src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
+++ b/src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
@@ -171,8 +171,8 @@
class FastModelScxEvsCortexR52x1(SystemC_ScModule):
type = 'FastModelScxEvsCortexR52x1'
- cxx_class = \
- 'gem5::fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x1Types>'
+ cxx_class = 'gem5::fastmodel::ScxEvsCortexR52<' \
+ 'gem5::fastmodel::ScxEvsCortexR52x1Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'
@@ -183,8 +183,8 @@
class FastModelScxEvsCortexR52x2(SystemC_ScModule):
type = 'FastModelScxEvsCortexR52x2'
- cxx_class = \
- 'gem5::fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x2Types>'
+ cxx_class = 'gem5::fastmodel::ScxEvsCortexR52<' \
+ 'gem5::fastmodel::ScxEvsCortexR52x2Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'
@@ -196,8 +196,8 @@
class FastModelScxEvsCortexR52x3(SystemC_ScModule):
type = 'FastModelScxEvsCortexR52x3'
- cxx_class = \
- 'gem5::fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x3Types>'
+ cxx_class = 'gem5::fastmodel::ScxEvsCortexR52<' \
+ 'gem5::fastmodel::ScxEvsCortexR52x3Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'
@@ -210,8 +210,8 @@
class FastModelScxEvsCortexR52x4(SystemC_ScModule):
type = 'FastModelScxEvsCortexR52x4'
- cxx_class = \
- 'gem5::fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x4Types>'
+ cxx_class = 'gem5::fastmodel::ScxEvsCortexR52<' \
+ 'gem5::fastmodel::ScxEvsCortexR52x4Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'
diff --git a/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
b/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
index 6fe843d..dc3f9ec 100644
--- a/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
+++ b/src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
@@ -223,7 +223,7 @@
}
}
-::Port &
+gem5::Port &
PL330::gem5_getPort(const std::string &if_name, int idx)
{
if (if_name == "dma") {
diff --git
a/src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa
b/src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa
index 0319584..093c544 100644
--- a/src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa
+++ b/src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa
@@ -36,8 +36,8 @@
description = "Exportable version of the clock rate control
protocol.";
version = "1.0";
dso_safe = 0;
- sc_slave_base_class_name = "ClockRateControlSlaveBase";
- sc_slave_socket_class_name = "ClockRateControlTargetSocket";
+ sc_slave_base_class_name = "gem5::ClockRateControlSlaveBase";
+ sc_slave_socket_class_name = "gem5::ClockRateControlTargetSocket";
}
slave behavior set_mul_div(uint64_t mul, uint64_t div);
diff --git a/src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa
b/src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa
index 4665e0b..6f941be 100644
--- a/src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa
+++ b/src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa
@@ -36,8 +36,8 @@
description = "Signal an interrupt from gem5.";
version = "1.0";
dso_safe = 0;
- sc_slave_base_class_name = "SignalInterruptSlaveBase";
- sc_slave_socket_class_name = "SignalInterruptTargetSocket";
+ sc_slave_base_class_name = "gem5::SignalInterruptSlaveBase";
+ sc_slave_socket_class_name = "gem5::SignalInterruptTargetSocket";
}
slave behavior ppi(uint8_t cpu, uint32_t num, bool state);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Iacb6291e6ee93aecf5208d283eab9c1b5938bb2b
Gerrit-Change-Number: 49617
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Bobby R. Bruce <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Jui-min Lee <[email protected]>
Gerrit-Reviewer: Yu-hsin Wang <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-CC: Gabe Black <[email protected]>
Gerrit-MessageType: merged
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