Bobby R. Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/52183 )
(
12 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
)Change subject: stdlib: Move 'connect_things' to the AbstractBoard
......................................................................
stdlib: Move 'connect_things' to the AbstractBoard
This is in order to enforce a strict ordering of how gem5 components are
incorporated into a board. The `connect_things` function is now final so
it cannot be overridden.
Change-Id: I4c0e7ac9d307b399854f5326bb57bcf561f92054
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52183
Tested-by: kokoro <noreply+kok...@google.com>
Reviewed-by: Bobby R. Bruce <bbr...@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbr...@ucdavis.edu>
---
M src/python/gem5/components/boards/simple_board.py
M src/python/gem5/components/boards/riscv_board.py
M src/python/gem5/components/boards/test_board.py
M src/python/gem5/components/boards/x86_board.py
M src/python/gem5/components/boards/abstract_board.py
5 files changed, 46 insertions(+), 54 deletions(-)
Approvals:
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/python/gem5/components/boards/abstract_board.py
b/src/python/gem5/components/boards/abstract_board.py
index 845ccb2..60ce0de 100644
--- a/src/python/gem5/components/boards/abstract_board.py
+++ b/src/python/gem5/components/boards/abstract_board.py
@@ -37,7 +37,7 @@
VoltageDomain,
)
-from typing import List
+from typing import List, final
class AbstractBoard(System):
@@ -219,15 +219,24 @@
"""
raise NotImplementedError
- @abstractmethod
+ @final
def connect_things(self) -> None:
"""Connects all the components to the board.
- This should be called after the constructor.
+ The order of this board is always:
- When implementing this function, derived boards should use this to
- hook up the memory, process, and cache hierarchy as a *second*
stage.
- You should use this function to connect things together when you
need
- to know that everything has already been constructed.
+ 1. Connect the memory.
+ 2. Connect the processor.
+ 3. Connect the cache hierarchy.
+
+ Developers may build upon this assumption when creating components.
"""
- raise NotImplementedError
+
+ # Incorporate the memory into the motherboard.
+ self.get_memory().incorporate_memory(self)
+
+ # Incorporate the processor into the motherboard.
+ self.get_processor().incorporate_processor(self)
+
+ # Incorporate the cache hierarchy for the motherboard.
+ self.get_cache_hierarchy().incorporate_cache(self)
diff --git a/src/python/gem5/components/boards/riscv_board.py
b/src/python/gem5/components/boards/riscv_board.py
index 18c742e..2b3261d 100644
--- a/src/python/gem5/components/boards/riscv_board.py
+++ b/src/python/gem5/components/boards/riscv_board.py
@@ -123,6 +123,9 @@
self._on_chip_devices = [self.platform.clint, self.platform.plic]
self._off_chip_devices = [self.platform.uart, self.disk]
+ # Set up the memory ranges
+ self.setup_memory_ranges()
+
def _setup_io_devices(self) -> None:
"""Connect the I/O devices to the I/O bus"""
@@ -192,20 +195,6 @@
self.mem_ranges = [AddrRange(start=0x80000000, size=mem_size)]
memory.set_memory_range(self.mem_ranges)
- @overrides(AbstractBoard)
- def connect_things(self) -> None:
- # Before incorporating the memory, set up the memory ranges
- self.setup_memory_ranges()
-
- # Incorporate the cache hierarchy for the motherboard.
- self.get_cache_hierarchy().incorporate_cache(self)
-
- # Incorporate the processor into the motherboard.
- self.get_processor().incorporate_processor(self)
-
- # Incorporate the memory into the motherboard.
- self.get_memory().incorporate_memory(self)
-
def generate_device_tree(self, outdir: str) -> None:
"""Creates the dtb and dts files.
diff --git a/src/python/gem5/components/boards/simple_board.py
b/src/python/gem5/components/boards/simple_board.py
index efe1736..3645ed8 100644
--- a/src/python/gem5/components/boards/simple_board.py
+++ b/src/python/gem5/components/boards/simple_board.py
@@ -72,16 +72,8 @@
exit_on_work_items=exit_on_work_items,
)
- @overrides(AbstractBoard)
- def connect_things(self) -> None:
- # Incorporate the cache hierarchy for the motherboard.
- self.get_cache_hierarchy().incorporate_cache(self)
-
- # Incorporate the processor into the motherboard.
- self.get_processor().incorporate_processor(self)
-
- # Incorporate the memory into the motherboard.
- self.get_memory().incorporate_memory(self)
+ # Set up the memory ranges
+ self.setup_memory_ranges()
@overrides(AbstractBoard)
def has_io_bus(self) -> bool:
diff --git a/src/python/gem5/components/boards/test_board.py
b/src/python/gem5/components/boards/test_board.py
index 861b5a8..aeb19a6 100644
--- a/src/python/gem5/components/boards/test_board.py
+++ b/src/python/gem5/components/boards/test_board.py
@@ -66,12 +66,7 @@
cache_hierarchy=cache_hierarchy,
)
- def connect_things(self) -> None:
- self.get_processor().incorporate_processor(self)
-
- self.get_memory().incorporate_memory(self)
-
- self.get_cache_hierarchy().incorporate_cache(self)
+ self.setup_memory_ranges()
@overrides(AbstractBoard)
def has_io_bus(self) -> bool:
diff --git a/src/python/gem5/components/boards/x86_board.py
b/src/python/gem5/components/boards/x86_board.py
index fe8ad5f..dfefd49 100644
--- a/src/python/gem5/components/boards/x86_board.py
+++ b/src/python/gem5/components/boards/x86_board.py
@@ -97,6 +97,12 @@
# North Bridge
self.iobus = IOXBar()
+ # Figure out the memory ranges.
+ self.setup_memory_ranges()
+
+ # Set up all of the I/O.
+ self._setup_io_devices()
+
def _setup_io_devices(self):
""" Sets up the x86 IO devices.
@@ -246,22 +252,6 @@
self.workload.e820_table.entries = entries
- def connect_things(self) -> None:
- # This board is a bit particular about the order that things are
- # connected together.
-
- # Set up all of the I/O before we incorporate anything else.
- self._setup_io_devices()
-
- # Incorporate the cache hierarchy for the motherboard.
- self.get_cache_hierarchy().incorporate_cache(self)
-
- # Incorporate the processor into the motherboard.
- self.get_processor().incorporate_processor(self)
-
- # Incorporate the memory into the motherboard.
- self.get_memory().incorporate_memory(self)
-
@overrides(AbstractBoard)
def has_io_bus(self) -> bool:
return True
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4c0e7ac9d307b399854f5326bb57bcf561f92054
Gerrit-Change-Number: 52183
Gerrit-PatchSet: 14
Gerrit-Owner: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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