[gem5-dev] Change in gem5/gem5[develop]: configs: Connect SDMA, IH, and memory manager in GPUFS

[Alex Dutu (Gerrit) via gem5-dev]

Alex Dutu has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/53065 )

Change subject: configs: Connect SDMA, IH, and memory manager in GPUFS
......................................................................

configs: Connect SDMA, IH, and memory manager in GPUFS

Add the devices that have been added to the staging branch so far to the
config file so that they may be tested.

Change-Id: I44110c9a24559936102a246c9658abb84a8ce07e
---
M src/dev/amdgpu/amdgpu_device.cc
M configs/example/gpufs/system/system.py
2 files changed, 69 insertions(+), 0 deletions(-)



diff --git a/configs/example/gpufs/system/system.py  
b/configs/example/gpufs/system/system.py
index 4ec3618..7cb6a0a 100644
--- a/configs/example/gpufs/system/system.py
+++ b/configs/example/gpufs/system/system.py
@@ -100,14 +100,38 @@
     shader.dispatcher = dispatcher
     shader.gpu_cmd_proc = gpu_cmd_proc

+    # GPU Interrupt Handler
+    device_ih = AMDGPUInterruptHandler()
+    system.pc.south_bridge.gpu.device_ih = device_ih
+
+    # Setup the SDMA engines
+    pt_walker3 = VegaPagetableWalker()
+    pt_walker4 = VegaPagetableWalker()
+
+    sdma0 = SDMAEngine(walker=pt_walker3)
+    sdma1 = SDMAEngine(walker=pt_walker4)
+
+    system.pc.south_bridge.gpu.sdma0 = sdma0
+    system.pc.south_bridge.gpu.sdma1 = sdma1
+
+    # GPU data path
+    gpu_mem_mgr = AMDGPUMemoryManager()
+    system.pc.south_bridge.gpu.memory_manager = gpu_mem_mgr
+
     # GPU, HSAPP, and GPUCommandProc are DMA devices
     system._dma_ports.append(gpu_hsapp)
     system._dma_ports.append(gpu_cmd_proc)
     system._dma_ports.append(system.pc.south_bridge.gpu)
+    system._dma_ports.append(sdma0)
+    system._dma_ports.append(sdma1)
+    system._dma_ports.append(device_ih)

     gpu_hsapp.pio = system.iobus.mem_side_ports
     gpu_cmd_proc.pio = system.iobus.mem_side_ports
     system.pc.south_bridge.gpu.pio = system.iobus.mem_side_ports
+    sdma0.pio = system.iobus.mem_side_ports
+    sdma1.pio = system.iobus.mem_side_ports
+    device_ih.pio = system.iobus.mem_side_ports

     # Create Ruby system using Ruby.py for now
     Ruby.create_system(args, True, system, system.iobus,
diff --git a/src/dev/amdgpu/amdgpu_device.cc  
b/src/dev/amdgpu/amdgpu_device.cc
index 77bd915..c41a505 100644
--- a/src/dev/amdgpu/amdgpu_device.cc
+++ b/src/dev/amdgpu/amdgpu_device.cc
@@ -214,6 +214,29 @@
 AMDGPUDevice::writeDoorbell(PacketPtr pkt, Addr offset)
 {
     DPRINTF(AMDGPUDevice, "Wrote doorbell %#lx\n", offset);
+
+    if (doorbells.find(offset) != doorbells.end()) {
+        QueueType q_type = doorbells[offset];
+        DPRINTF(AMDGPUDevice, "Doorbell offset %p queue: %d\n",
+                              offset, q_type);
+        switch (q_type) {
+          case SDMAGfx: {
+            SDMAEngine *sdmaEng = getSDMAEngine(offset);
+            sdmaEng->processGfx(pkt->getLE<uint64_t>());
+          } break;
+          case SDMAPage: {
+            SDMAEngine *sdmaEng = getSDMAEngine(offset);
+            sdmaEng->processPage(pkt->getLE<uint64_t>());
+          } break;
+          case InterruptHandler:
+            deviceIH->updateRptr(pkt->getLE<uint32_t>());
+            break;
+          default:
+            panic("Write to unkown queue type!");
+        }
+    } else {
+        warn("Unknown doorbell offset: %lx\n", offset);
+    }
 }

 void
@@ -225,6 +248,16 @@
     DPRINTF(AMDGPUDevice, "Wrote MMIO %#lx\n", offset);

     switch (aperture) {
+      case SDMA0_BASE:
+        sdma0->writeMMIO(pkt, aperture_offset >> SDMA_OFFSET_SHIFT);
+        break;
+      case SDMA1_BASE:
+        sdma1->writeMMIO(pkt, aperture_offset >> SDMA_OFFSET_SHIFT);
+        break;
+      case GRBM_BASE:
+        gpuvm.writeMMIO(pkt, aperture_offset >> GRBM_OFFSET_SHIFT);
+        pm4PktProc->writeMMIO(pkt, aperture_offset >> GRBM_OFFSET_SHIFT);
+        break;
       case IH_BASE:
         deviceIH->writeMMIO(pkt, aperture_offset >> IH_OFFSET_SHIFT);
         break;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I44110c9a24559936102a246c9658abb84a8ce07e
Gerrit-Change-Number: 53065
Gerrit-PatchSet: 1
Gerrit-Owner: Alex Dutu <alexandru.d...@amd.com>
Gerrit-MessageType: newchange
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