Matthew Poremba has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/55343 )
Change subject: arch-vega: Validate if scalar sources are scalar gprs
......................................................................
arch-vega: Validate if scalar sources are scalar gprs
Port the fixes for scalar source checks from arch-gcn3 at
https://gem5-review.googlesource.com/c/public/gem5/+/48344.
Scalar sources can either be a general-purpose register or a constant
register that holds a single value.
If we don't check for if the register is a general-purpose register,
it's possible that we get a constant register, which then causes all of
the register mapping code to break, as the constant registers aren't
supposed to be mapped like the general-purpose registers are.
This fix adds an isScalarReg check to the instruction encodings that
were missing it.
Change-Id: I30dd2d082a5a1dcc3075843bcefd325113ed1df6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55343
Reviewed-by: Matt Sinclair <mattdsincl...@gmail.com>
Maintainer: Matt Sinclair <mattdsincl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/amdgpu/vega/insts/op_encodings.cc
1 file changed, 33 insertions(+), 6 deletions(-)
Approvals:
Matt Sinclair: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/amdgpu/vega/insts/op_encodings.cc
b/src/arch/amdgpu/vega/insts/op_encodings.cc
index 40910e4..6f78b69 100644
--- a/src/arch/amdgpu/vega/insts/op_encodings.cc
+++ b/src/arch/amdgpu/vega/insts/op_encodings.cc
@@ -1274,12 +1274,12 @@
reg = extData.SRSRC;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
reg = extData.SOFFSET;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
}
@@ -1365,12 +1365,12 @@
reg = extData.SRSRC;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
reg = extData.SOFFSET;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
// extData.VDATA moves in the reg list depending on the instruction
@@ -1438,13 +1438,13 @@
reg = extData.SRSRC;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
if (getNumOperands() == 4) {
reg = extData.SSAMP;
srcOps.emplace_back(reg, getOperandSize(opNum), true,
- true, false, false);
+ isScalarReg(reg), false, false);
opNum++;
}
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I30dd2d082a5a1dcc3075843bcefd325113ed1df6
Gerrit-Change-Number: 55343
Gerrit-PatchSet: 2
Gerrit-Owner: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: Kyle Roarty <kyleroarty1...@gmail.com>
Gerrit-Reviewer: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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