Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/55445 )
(
2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
)Change subject: arch-x86: Add decoder syntax for fixed segment registers.
......................................................................
arch-x86: Add decoder syntax for fixed segment registers.
There is syntax for this already for fixed integer registers, which this
is patterned after. Rather than prefixing the operand descriptor with a
lower case "r", fixed segment registers are prefixed with a lower case
"s".
Change-Id: Ic08d323bef732a62de23f77ec805c8b7cd5e2303
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/55445
Reviewed-by: Matt Sinclair <mattdsincl...@gmail.com>
Maintainer: Matt Sinclair <mattdsincl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/x86/isa/specialize.isa
1 file changed, 34 insertions(+), 1 deletion(-)
Approvals:
Matt Sinclair: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/x86/isa/specialize.isa
b/src/arch/x86/isa/specialize.isa
index 7afdd23..f90aa48 100644
--- a/src/arch/x86/isa/specialize.isa
+++ b/src/arch/x86/isa/specialize.isa
@@ -104,17 +104,22 @@
let {{
class OpType(object):
- parser = re.compile(r"(?P<tag>[A-Z]+)(?P<size>[a-z]*)|
(r(?P<reg>[A-Z0-9]+)(?P<rsize>[a-z]*))")
+ parser = re.compile(r"(?P<tag>[A-Z]+)(?P<size>[a-z]*)|"
+ "(r(?P<reg>[A-Z0-9]+)(?P<rsize>[a-z]*))|"
+ "(s(?P<seg>[A-Z0-9]+)(?P<ssize>[a-z]*))")
def __init__(self, opTypeString):
match = OpType.parser.search(opTypeString)
if match == None:
raise Exception("Problem parsing operand type {}".format(
opTypeString))
self.reg = match.group("reg")
+ self.seg = match.group("seg")
self.tag = match.group("tag")
self.size = match.group("size")
if not self.size:
self.size = match.group("rsize")
+ if not self.size:
+ self.size = match.group("ssize")
ModRMRegIndex = "(MODRM_REG | (REX_R << 3))"
ModRMRMIndex = "(MODRM_RM | (REX_B << 3))"
@@ -151,6 +156,16 @@
Name += "_R"
+ elif opType.seg:
+ env.addReg("SEGMENT_REG_%sS" % opType.seg)
+ if env.regmUsed:
+ regString = "env.regm"
+ else:
+ regString = "env.reg"
+ env.addToDisassembly("printSegment(out, %s);\n" %
regString)
+
+ Name += "_S"
+
elif opType.tag == "B":
# This refers to registers whose index is encoded as part
of
# the opcode.
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic08d323bef732a62de23f77ec805c8b7cd5e2303
Gerrit-Change-Number: 55445
Gerrit-PatchSet: 5
Gerrit-Owner: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Bradford Beckmann <bradford.beckm...@gmail.com>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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