Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/55703 )
Change subject: arch-arm, dev-arm: Remove generic BaseGicRegisters interface
......................................................................
arch-arm, dev-arm: Remove generic BaseGicRegisters interface
The GICv3 register interface is different from the GICv2 one: from
the presence of redistributor registers up to the system register
implementation of the cpu-interface
We therefore make the current BaseGicRegisters interface GICv2 specific.
We will define a different Gic3Registers interface for GICv3 state
transfer
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Change-Id: I42f15f48cab6e26aaf519e13c2ce70f661801117
---
M src/arch/arm/kvm/gic.hh
M src/dev/arm/base_gic.hh
M src/dev/arm/gic_v2.cc
M src/dev/arm/gic_v2.hh
4 files changed, 50 insertions(+), 33 deletions(-)
diff --git a/src/arch/arm/kvm/gic.hh b/src/arch/arm/kvm/gic.hh
index 5201f58..5207ad0 100644
--- a/src/arch/arm/kvm/gic.hh
+++ b/src/arch/arm/kvm/gic.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, 2021 Arm Limited
+ * Copyright (c) 2015-2017, 2021-2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -54,7 +54,7 @@
* model. It exposes an API that is similar to that of
* software-emulated GIC models in gem5.
*/
-class KvmKernelGic : public BaseGicRegisters
+class KvmKernelGic
{
public:
/**
@@ -131,7 +131,7 @@
KvmDevice kdev;
};
-class KvmKernelGicV2 : public KvmKernelGic
+class KvmKernelGicV2 : public KvmKernelGic, public Gicv2Registers
{
public:
/**
@@ -148,7 +148,7 @@
KvmKernelGicV2(KvmVM &vm, Addr cpu_addr, Addr dist_addr,
unsigned it_lines);
- public: // BaseGicRegisters
+ public: // Gicv2Registers
uint32_t readDistributor(ContextID ctx, Addr daddr) override;
uint32_t readCpu(ContextID ctx, Addr daddr) override;
diff --git a/src/dev/arm/base_gic.hh b/src/dev/arm/base_gic.hh
index b741585..1ab8c2a 100644
--- a/src/dev/arm/base_gic.hh
+++ b/src/dev/arm/base_gic.hh
@@ -134,17 +134,6 @@
Platform *platform;
};
-class BaseGicRegisters
-{
- public:
- virtual uint32_t readDistributor(ContextID ctx, Addr daddr) = 0;
- virtual uint32_t readCpu(ContextID ctx, Addr daddr) = 0;
-
- virtual void writeDistributor(ContextID ctx, Addr daddr,
- uint32_t data) = 0;
- virtual void writeCpu(ContextID ctx, Addr daddr, uint32_t data) = 0;
-};
-
/**
* This SimObject is instantiated in the python world and
* serves as an ArmInterruptPin generator. In this way it
diff --git a/src/dev/arm/gic_v2.cc b/src/dev/arm/gic_v2.cc
index ecf4908..057d900 100644
--- a/src/dev/arm/gic_v2.cc
+++ b/src/dev/arm/gic_v2.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010, 2013, 2015-2018, 2020-2021 Arm Limited
+ * Copyright (c) 2010, 2013, 2015-2018, 2020-2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -998,7 +998,7 @@
}
void
-GicV2::copyGicState(BaseGicRegisters* from, BaseGicRegisters* to)
+GicV2::copyGicState(Gicv2Registers* from, Gicv2Registers* to)
{
Addr set, clear;
size_t size;
@@ -1070,7 +1070,7 @@
}
void
-GicV2::copyDistRegister(BaseGicRegisters* from, BaseGicRegisters* to,
+GicV2::copyDistRegister(Gicv2Registers* from, Gicv2Registers* to,
ContextID ctx, Addr daddr)
{
auto val = from->readDistributor(ctx, daddr);
@@ -1079,7 +1079,7 @@
}
void
-GicV2::copyCpuRegister(BaseGicRegisters* from, BaseGicRegisters* to,
+GicV2::copyCpuRegister(Gicv2Registers* from, Gicv2Registers* to,
ContextID ctx, Addr daddr)
{
auto val = from->readCpu(ctx, daddr);
@@ -1088,7 +1088,7 @@
}
void
-GicV2::copyBankedDistRange(BaseGicRegisters* from, BaseGicRegisters* to,
+GicV2::copyBankedDistRange(Gicv2Registers* from, Gicv2Registers* to,
Addr daddr, size_t size)
{
for (int ctx = 0; ctx < sys->threads.size(); ++ctx)
@@ -1097,7 +1097,7 @@
}
void
-GicV2::clearBankedDistRange(BaseGicRegisters* to,
+GicV2::clearBankedDistRange(Gicv2Registers* to,
Addr daddr, size_t size)
{
for (int ctx = 0; ctx < sys->threads.size(); ++ctx)
@@ -1106,7 +1106,7 @@
}
void
-GicV2::copyDistRange(BaseGicRegisters* from, BaseGicRegisters* to,
+GicV2::copyDistRange(Gicv2Registers* from, Gicv2Registers* to,
Addr daddr, size_t size)
{
for (auto a = daddr; a < daddr + size; a += 4)
@@ -1114,7 +1114,7 @@
}
void
-GicV2::clearDistRange(BaseGicRegisters* to,
+GicV2::clearDistRange(Gicv2Registers* to,
Addr daddr, size_t size)
{
for (auto a = daddr; a < daddr + size; a += 4)
diff --git a/src/dev/arm/gic_v2.hh b/src/dev/arm/gic_v2.hh
index 8031b3b..0ceba04 100644
--- a/src/dev/arm/gic_v2.hh
+++ b/src/dev/arm/gic_v2.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010, 2013, 2015-2021 Arm Limited
+ * Copyright (c) 2010, 2013, 2015-2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -59,7 +59,18 @@
namespace gem5
{
-class GicV2 : public BaseGic, public BaseGicRegisters
+class Gicv2Registers
+{
+ public:
+ virtual uint32_t readDistributor(ContextID ctx, Addr daddr) = 0;
+ virtual uint32_t readCpu(ContextID ctx, Addr daddr) = 0;
+
+ virtual void writeDistributor(ContextID ctx, Addr daddr,
+ uint32_t data) = 0;
+ virtual void writeCpu(ContextID ctx, Addr daddr, uint32_t data) = 0;
+};
+
+class GicV2 : public BaseGic, public Gicv2Registers
{
protected:
// distributor memory addresses
@@ -513,20 +524,19 @@
bool supportsVersion(GicVersion version) override;
protected: /** GIC state transfer */
- void copyGicState(BaseGicRegisters* from, BaseGicRegisters* to);
+ void copyGicState(Gicv2Registers* from, Gicv2Registers* to);
- void copyDistRegister(BaseGicRegisters* from, BaseGicRegisters* to,
+ void copyDistRegister(Gicv2Registers* from, Gicv2Registers* to,
ContextID ctx, Addr daddr);
- void copyCpuRegister(BaseGicRegisters* from, BaseGicRegisters* to,
+ void copyCpuRegister(Gicv2Registers* from, Gicv2Registers* to,
ContextID ctx, Addr daddr);
-
- void copyBankedDistRange(BaseGicRegisters* from, BaseGicRegisters* to,
+ void copyBankedDistRange(Gicv2Registers* from, Gicv2Registers* to,
Addr daddr, size_t size);
- void clearBankedDistRange(BaseGicRegisters* to,
+ void clearBankedDistRange(Gicv2Registers* to,
Addr daddr, size_t size);
- void copyDistRange(BaseGicRegisters* from, BaseGicRegisters* to,
+ void copyDistRange(Gicv2Registers* from, Gicv2Registers* to,
Addr daddr, size_t size);
- void clearDistRange(BaseGicRegisters* to,
+ void clearDistRange(Gicv2Registers* to,
Addr daddr, size_t size);
/** Handle a read to the distributor portion of the GIC
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I42f15f48cab6e26aaf519e13c2ce70f661801117
Gerrit-Change-Number: 55703
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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