Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/55964 )
Change subject: arch-arm, kvm: Handle vcpu2 if more than 256 vCPUs are in
use
......................................................................
arch-arm, kvm: Handle vcpu2 if more than 256 vCPUs are in use
According to KVM Docs [1]:
"When KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 is supported, the target vcpu is
identified as (256 * vcpu2_index + vcpu_index). Otherwise, vcpu2_index
must be zero."
The vcpu parameter from the setIntState method is populated with
the gem5 context identifier (ContextID) of a specific PE.
It is not contrained by the 256 vcpu limit, so it can already specify
more than 256 vcpus. We therefore just need to translate/unpack the
value in two indices (vcpu and vcpu2) which will be forwarded to KVM
when raising an IRQ from userspace.
We guard the vcpu2 retrieval with a hash define as this is a late
addition and some older kernels do not define this capability (4.15 as
an example).
[1]: https://www.kernel.org/doc/html/latest/virt/kvm/api.html
Signed-off-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Change-Id: If0c475dc4a573337edd053020920e9b109d13991
---
M src/arch/arm/kvm/gic.cc
1 file changed, 47 insertions(+), 2 deletions(-)
diff --git a/src/arch/arm/kvm/gic.cc b/src/arch/arm/kvm/gic.cc
index efd8e54..3ceb814 100644
--- a/src/arch/arm/kvm/gic.cc
+++ b/src/arch/arm/kvm/gic.cc
@@ -91,12 +91,28 @@
KvmKernelGic::setIntState(unsigned type, unsigned vcpu, unsigned irq,
bool high)
{
+#ifdef KVM_CAP_ARM_IRQ_LINE_LAYOUT_2
+ static const bool vcpu2_enabled = vm.checkExtension(
+ KVM_CAP_ARM_IRQ_LINE_LAYOUT_2);
+
+ const unsigned vcpu2_mask = vcpu2_enabled ? KVM_ARM_IRQ_VCPU2_MASK : 0;
+ const unsigned vcpu2_shift = vcpu2_enabled ? KVM_ARM_IRQ_VCPU2_SHIFT :
0;
+#else
+ const unsigned vcpu2_mask = 0;
+ const unsigned vcpu2_shift = 0;
+#endif
+
+ const unsigned vcpu_index = vcpu % 256;
+ const unsigned vcpu2_index = vcpu / 256;
+
+ assert(vcpu2_index <= vcpu2_mask);
assert(type <= KVM_ARM_IRQ_TYPE_MASK);
- assert(vcpu <= KVM_ARM_IRQ_VCPU_MASK);
+ assert(vcpu_index <= KVM_ARM_IRQ_VCPU_MASK);
assert(irq <= KVM_ARM_IRQ_NUM_MASK);
const uint32_t line(
+ (vcpu2_index << vcpu2_shift) |
(type << KVM_ARM_IRQ_TYPE_SHIFT) |
- (vcpu << KVM_ARM_IRQ_VCPU_SHIFT) |
+ (vcpu_index << KVM_ARM_IRQ_VCPU_SHIFT) |
(irq << KVM_ARM_IRQ_NUM_SHIFT));
vm.setIRQLine(line, high);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: If0c475dc4a573337edd053020920e9b109d13991
Gerrit-Change-Number: 55964
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-MessageType: newchange
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