Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/56907 )
Change subject: arch-x86: For ints, take advantage of rom uop context
change.
......................................................................
arch-x86: For ints, take advantage of rom uop context change.
Now that we don't have to try to manually apply operand, address and
stack sizes, we can greatly simplify the code which generates an
interrupt stack frame.
Change-Id: I402d1dfcff7e42fda8d846d48d0ecd5f0a484de8
---
M src/arch/x86/microcode/romutil.ucode
1 file changed, 72 insertions(+), 181 deletions(-)
diff --git a/src/arch/x86/microcode/romutil.ucode
b/src/arch/x86/microcode/romutil.ucode
index 13a9d2b..dc6e458 100644
--- a/src/arch/x86/microcode/romutil.ucode
+++ b/src/arch/x86/microcode/romutil.ucode
@@ -26,8 +26,7 @@
include "macros/segmentation.ucode"
-def macro long_int start_label, gate_check_type="IntGateCheck", \
- error_code_size=0, error_code_code=""
+def macro long_int start_label, gate_check_type="IntGateCheck",
with_ec=False
{
# This vectors the CPU into an interrupt handler in long mode.
# On entry, t1 is set to the vector of the interrupt and t7 is the
current
@@ -101,7 +100,6 @@
{start_label}_stackSwitched:
andi t6, t6, 0xF0, dataSize=1
- subi t6, t6, 40 + {error_code_size}, dataSize=8
##
## Point of no return.
@@ -123,9 +121,8 @@
wrsel cs, t5, dataSize=2
# Check that we can access everything we need to on the stack
- ldst t0, hs, [1, t0, t6], dataSize=8, addressSize=8
- ldst t0, hs, [1, t0, t6], \
- 32 + {error_code_size}, dataSize=8, addressSize=8
+ cda hs, [1, t0, t6], -8, dataSize=8
+ cda hs, [1, t0, t6], -{48 if with_ec else 40}, dataSize=8
#
@@ -134,17 +131,17 @@
# Write out the contents of memory
- {error_code_code}
- st t7, hs, [1, t0, t6], {error_code_size}, dataSize=8, addressSize=8
- st t10, hs, [1, t0, t6], 8 + {error_code_size}, dataSize=8,
addressSize=8
- rflags t10, dataSize=8
- st t10, hs, [1, t0, t6], 16 + {error_code_size}, dataSize=8,
addressSize=8
- st rsp, hs, [1, t0, t6], 24 + {error_code_size}, dataSize=8,
addressSize=8
rdsel t5, ss, dataSize=2
- st t5, hs, [1, t0, t6], 32 + {error_code_size}, dataSize=8,
addressSize=8
+ st t5, hs, [1, t0, t6], -8, dataSize=8
+ st rsp, hs, [1, t0, t6], -16, dataSize=8
+ rflags t5, dataSize=8
+ st t5, hs, [1, t0, t6], -24, dataSize=8
+ st t10, hs, [1, t0, t6], -32, dataSize=8
+ st t7, hs, [1, t0, t6], -40, dataSize=8
+ {"st t15, hs, [1, t0, t6], -48, dataSize=8" if with_ec else ""}
# Set the stack segment
- mov rsp, rsp, t6, dataSize=8
+ subi rsp, t6, {48 if with_ec else 40}, dataSize=8
wrsel ss, t11, dataSize=2
#
@@ -174,16 +171,12 @@
{
long_int "longModeInterrupt"
long_int "longModeSoftInterrupt", gate_check_type="SoftIntGateCheck"
- long_int "longModeInterruptWithError", error_code_size=8, \
- error_code_code="""
- st t15, hs, [1, t0, t6], dataSize=8, addressSize=8
- """
+ long_int "longModeInterruptWithError", with_ec=True
};
undef macro long_int;
-def macro legacy_int start_label, gate_check_type="IntGateCheck", \
- error_code_size=0, error_code_code="#"
+def macro legacy_int start_label, gate_check_type="IntGateCheck",
with_ec=False
{
# This vectors the CPU into an interrupt handler in legacy mode.
# On entry, t1 is set to the vector of the interrupt and t7 is the
current
@@ -247,6 +240,7 @@
br "{start_label}_noStackSwitch", flags=(CEZF,)
# Get the new ESP from the TSS
+ mov t6, rsp, rsp, dataSize=8
ld t6, tr, [8, t10, t0], 4, dataSize=4, addressSize=8, atCPL0=True
# Get the new SS from the TSS
ld t8, tr, [8, t10, t0], 8, dataSize=2, addressSize=8, atCPL0=True
@@ -257,192 +251,77 @@
chks t0, t8, t12, SSCheck, dataSize=8
wrdl hs, t12, t8, dataSize=8
- # Find the size of stack addresses based on this new descriptor.
- rdattr t14, hs, dataSize=8
- andi t0, t14, 0x8, flags=(EZF,), dataSize=8
-
- br "{start_label}_sszIs4Switched", flags=(nCEZF,)
- br "{start_label}_sszIs2DszIs4Switched", flags=(CECF,)
-
- # ssz = 2, dsz = 2
-
- # Make sure the space on the stack is accessible.
- cda hs, [1, t0, t6], -1, dataSize=1, addressSize=2
- cda hs, [1, t0, t6], -10 - {error_code_size} / 2, \
- dataSize=1, addressSize=2
-
# Point of no return.
rdsel t2, ss, dataSize=8
- st t2, hs, [1, t0, t6], -2, dataSize=2, addressSize=2
- st rsp, hs, [1, t0, t6], -4, dataSize=2, addressSize=2
+ wrdl ss, t12, t8, dataSize=8
+ wrsel ss, t8, dataSize=8
+
+ # Make sure the space on the stack is accessible.
+ br "{start_label}_dszIs4Switched", flags=(CECF,)
+
+ cda hs, [1, t0, t6], -2, dataSize=2, addressSize=ssz
+ cda hs, [1, t0, t6], -{12 if with_ec else 10}, dataSize=2,
addressSize=ssz
+
+ st t2, hs, [1, t0, t6], -2, dataSize=2, addressSize=ssz
+ st rsp, hs, [1, t0, t6], -4, dataSize=2, addressSize=ssz
rflags t10, dataSize=8
- st t10, hs, [1, t0, t6], -6, dataSize=2, addressSize=2
- st t1, hs, [1, t0, t6], -8, dataSize=2, addressSize=2
- st t7, hs, [1, t0, t6], -10, dataSize=2, addressSize=2
+ st t10, hs, [1, t0, t6], -6, dataSize=2, addressSize=ssz
+ st t1, hs, [1, t0, t6], -8, dataSize=2, addressSize=ssz
+ st t7, hs, [1, t0, t6], -10, dataSize=2, addressSize=ssz
+ subi t6, t6, {12 if with_ec else 10}, dataSize=ssz
+ {"st t15, hs, [1, t0, t6], dataSize=2, addressSize=ssz" if with_ec
else ""}
mov rsp, rsp, t6, dataSize=4
- subi rsp, rsp, 10 + {error_code_size} / 2, dataSize=2
- wrdl ss, t12, t8, dataSize=8
- wrsel ss, t8, dataSize=8
- {error_code_code}, dataSize=2, addressSize=2
br "{start_label}_doneWithStack"
-{start_label}_sszIs2DszIs4Switched:
+{start_label}_dszIs4Switched:
- # ssz = 2, dsz = 4
+ cda hs, [1, t0, t6], -4, dataSize=4, addressSize=ssz
+ cda hs, [1, t0, t6], -{24 if with_ec else 20}, dataSize=4,
addressSize=ssz
- # Make sure the space on the stack is accessible.
- cda hs, [1, t0, t6], -1, dataSize=1, addressSize=2
- cda hs, [1, t0, t6], -20 - {error_code_size}, \
- dataSize=1, addressSize=2
-
- # Point of no return.
- rdsel t2, ss, dataSize=8
- st t2, hs, [1, t0, t6], -4, dataSize=4, addressSize=2
- st rsp, hs, [1, t0, t6], -8, dataSize=4, addressSize=2
+ st t2, hs, [1, t0, t6], -4, dataSize=4, addressSize=ssz
+ st rsp, hs, [1, t0, t6], -8, dataSize=4, addressSize=ssz
rflags t10, dataSize=8
- st t10, hs, [1, t0, t6], -12, dataSize=4, addressSize=2
- st t1, hs, [1, t0, t6], -16, dataSize=4, addressSize=2
- st t7, hs, [1, t0, t6], -20, dataSize=4, addressSize=2
+ st t10, hs, [1, t0, t6], -12, dataSize=4, addressSize=ssz
+ st t1, hs, [1, t0, t6], -16, dataSize=4, addressSize=ssz
+ st t7, hs, [1, t0, t6], -20, dataSize=4, addressSize=ssz
+ subi t6, t6, {24 if with_ec else 20}, dataSize=ssz
+ {"st t15, hs, [1, t0, t6], dataSize=4, addressSize=ssz" if with_ec
else ""}
mov rsp, rsp, t6, dataSize=4
- subi rsp, rsp, 20 + {error_code_size}, dataSize=2
- wrdl ss, t12, t8, dataSize=8
- wrsel ss, t8, dataSize=8
- {error_code_code}, dataSize=4, addressSize=2
br "{start_label}_doneWithStack"
-{start_label}_sszIs4Switched:
- br "{start_label}_sszIs4DszIs4Switched", flags=(CECF,)
-
- # ssz = 4, dsz = 2
-
- # Make sure the space on the stack is accessible.
- cda hs, [1, t0, t6], -1, dataSize=1, addressSize=4
- cda hs, [1, t0, t6], -10 - {error_code_size} / 2, \
- dataSize=1, addressSize=4
-
- # Point of no return.
- rdsel t2, ss, dataSize=8
- st t2, hs, [1, t0, t6], -2, dataSize=2, addressSize=4
- st rsp, hs, [1, t0, t6], -4, dataSize=2, addressSize=4
- rflags t10, dataSize=8
- st t10, hs, [1, t0, t6], -6, dataSize=2, addressSize=4
- st t12, hs, [1, t0, t6], -8, dataSize=2, addressSize=4
- st t7, hs, [1, t0, t6], -10, dataSize=2, addressSize=4
- subi rsp, t6, 10 + {error_code_size} / 2, dataSize=4
- wrdl ss, t12, t8, dataSize=8
- wrsel ss, t8, dataSize=8
- {error_code_code}, dataSize=2, addressSize=4
-
- br "{start_label}_doneWithStack"
-
-{start_label}_sszIs4DszIs4Switched:
-
- # ssz = 4, dsz = 4
-
- # Make sure the space on the stack is accessible.
- cda hs, [1, t0, t6], -1, dataSize=1, addressSize=4
- cda hs, [1, t0, t6], -20 - {error_code_size}, \
- dataSize=1, addressSize=4
-
- # Point of no return.
- rdsel t2, ss, dataSize=8
- st t2, hs, [1, t0, t6], -4, dataSize=4, addressSize=4
- st rsp, hs, [1, t0, t6], -8, dataSize=4, addressSize=4
- rflags t10, dataSize=8
- st t10, hs, [1, t0, t6], -12, dataSize=4, addressSize=4
- st t1, hs, [1, t0, t6], -16, dataSize=4, addressSize=4
- st t7, hs, [1, t0, t6], -20, dataSize=4, addressSize=4
- subi rsp, t6, 20 + {error_code_size}, dataSize=4
- wrdl ss, t12, t8, dataSize=8
- wrsel ss, t8, dataSize=8
- {error_code_code}, dataSize=2, addressSize=4
-
- br "{start_label}_doneWithStack"
-
-
{start_label}_noStackSwitch:
- # Find the size of stack addresses based on the stack descriptor.
- rdattr t14, ss, dataSize=8
- andi t0, t14, 0x8, flags=(EZF,), dataSize=8
+ br "{start_label}_dszIs4", flags=(CECF,)
- br "{start_label}_sszIs4", flags=(nCEZF,)
- br "{start_label}_sszIs2DszIs4", flags=(CECF,)
-
- # Make sure the space on the stack is accessible.
- cda ss, [1, t0, rsp], -1, dataSize=1, addressSize=2
- cda ss, [1, t0, rsp], -6 - {error_code_size} / 2, \
- dataSize=1, addressSize=2
+ cda ss, [1, t0, rsp], -2, dataSize=2, addressSize=ssz
+ cda ss, [1, t0, rsp], -{8 if with_ec else 6}, dataSize=2,
addressSize=ssz
# Point of no return.
rflags t10, dataSize=8
- st t10, ss, [1, t0, t6], -2, dataSize=2, addressSize=2
- st t1, ss, [1, t0, t6], -4, dataSize=2, addressSize=2
- st t7, ss, [1, t0, t6], -6, dataSize=2, addressSize=2
- subi rsp, rsp, 6 + {error_code_size} / 2, dataSize=2
- {error_code_code}, dataSize=2, addressSize=2
+ st t10, ss, [1, t0, rsp], -2, dataSize=2, addressSize=ssz
+ st t1, ss, [1, t0, rsp], -4, dataSize=2, addressSize=ssz
+ st t7, ss, [1, t0, rsp], -6, dataSize=2, addressSize=ssz
+ subi rsp, rsp, {8 if with_ec else 6}, dataSize=ssz
+ {"st t15, ss, [1, t0, rsp], " if with_ec else "#"} \
+ {"dataSize=2, addressSize=ssz" if with_ec else ""}
br "{start_label}_doneWithStack"
-{start_label}_sszIs2DszIs4:
+{start_label}_dszIs4:
- # ssz = 2, dsz = 4
-
- # Make sure the space on the stack is accessible.
- cda ss, [1, t0, rsp], -1, dataSize=1, addressSize=2
- cda ss, [1, t0, rsp], -12 - {error_code_size}, \
- dataSize=1, addressSize=2
+ cda ss, [1, t0, rsp], -4, dataSize=4, addressSize=ssz
+ cda ss, [1, t0, rsp], -{16 if with_ec else 12}, dataSize=4,
addressSize=ssz
# Point of no return.
rflags t10, dataSize=8
- st t10, ss, [1, t0, rsp], -4, dataSize=4, addressSize=2
- st t1, ss, [1, t0, rsp], -8, dataSize=4, addressSize=2
- st t7, ss, [1, t0, rsp], -12, dataSize=4, addressSize=2
- subi rsp, rsp, 12 + {error_code_size}, dataSize=2
- {error_code_code}, dataSize=4, addressSize=2
-
- br "{start_label}_doneWithStack"
-
-{start_label}_sszIs4:
- br "{start_label}_sszIs4DszIs4", flags=(CECF,)
-
- # ssz = 4, dsz = 2
-
- # Make sure the space on the stack is accessible.
- cda ss, [1, t0, rsp], -1, dataSize=1, addressSize=4
- cda ss, [1, t0, rsp], -6 - {error_code_size} / 2, \
- dataSize=1, addressSize=4
-
- # Point of no return.
- rflags t10, dataSize=8
- st t10, ss, [1, t0, rsp], -2, dataSize=2, addressSize=4
- st t1, ss, [1, t0, rsp], -4, dataSize=2, addressSize=4
- st t7, ss, [1, t0, rsp], -6, dataSize=2, addressSize=4
- subi rsp, rsp, 6 + {error_code_size} / 2, dataSize=4
- {error_code_code}, dataSize=2, addressSize=4
-
- br "{start_label}_doneWithStack"
-
-{start_label}_sszIs4DszIs4:
-
- # ssz = 4, dsz = 4
-
- # Make sure the space on the stack is accessible.
- cda ss, [1, t0, rsp], -1, dataSize=1, addressSize=4
- cda ss, [1, t0, rsp], -12 - {error_code_size}, \
- dataSize=1, addressSize=4
-
- # Point of no return.
- rflags t10, dataSize=8
- st t10, ss, [1, t0, rsp], -4, dataSize=4, addressSize=4
- st t1, ss, [1, t0, rsp], -8, dataSize=4, addressSize=4
- st t7, ss, [1, t0, rsp], -12, dataSize=4, addressSize=4
- subi rsp, rsp, 12 + {error_code_size}, dataSize=4
- {error_code_code}, dataSize=4, addressSize=4
-
- br "{start_label}_doneWithStack"
+ st t10, ss, [1, t0, rsp], -4, dataSize=4, addressSize=ssz
+ st t1, ss, [1, t0, rsp], -8, dataSize=4, addressSize=ssz
+ st t7, ss, [1, t0, rsp], -12, dataSize=4, addressSize=ssz
+ subi rsp, rsp, {16 if with_ec else 12}, dataSize=ssz
+ {"st t15, ss, [1, t0, rsp], " if with_ec else "#"} \
+ {"dataSize=4, addressSize=ssz" if with_ec else ""}
{start_label}_doneWithStack:
@@ -471,8 +350,7 @@
{
legacy_int "legacyModeInterrupt"
legacy_int "legacyModeSoftInterrupt",
gate_check_type="SoftIntGateCheck"
- legacy_int "legacyModeInterruptWithError", error_code_size=4, \
- error_code_code="st t15, ss, [1, t0, rsp]"
+ legacy_int "legacyModeInterruptWithError", with_ec=True
};
undef macro legacy_int;
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I402d1dfcff7e42fda8d846d48d0ecd5f0a484de8
Gerrit-Change-Number: 56907
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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